Thomas Harte
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9c0f622a2e
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Started working CRC checking into the 1770. Discovered immediately that my generated CRC does not match that built into the Oric disk images. So mine is pretty-much certainly wrong. An opportunity for learning!
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2016-12-26 16:46:26 -05:00 |
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Thomas Harte
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0490a47058
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Worked on the all-around framework for decoding sectors back from tracks when closing down a file. Hit the wall that the parser is more observant of CRCs than the WD. No, really. So I guess I have to stop avoiding that whole issue.
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2016-12-26 14:24:33 -05:00 |
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Thomas Harte
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83c433c142
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Deviated from the data sheet, which seems likely to be correct. Hence removed a whole load of the temporary logging.
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2016-12-26 12:48:49 -05:00 |
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Thomas Harte
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742c5df367
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With lots of logging arising temporarily, fixed bug whereby conversion to a patched track would lead to holding a track with a distinct measure of time, leading to improperly-placed patches.
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2016-12-25 22:00:39 -05:00 |
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Thomas Harte
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acc35885cd
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Attempted to reduce track invalidations.
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2016-12-25 20:38:25 -05:00 |
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Thomas Harte
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c0a1264ab0
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Slightly improved legibility.
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2016-12-25 20:19:47 -05:00 |
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Thomas Harte
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e2b829f68e
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Made an attempt to write the proper address mark.
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2016-12-25 20:15:07 -05:00 |
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Thomas Harte
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beaa868079
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Factored the MFM parser out into encodings.
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2016-12-25 20:00:57 -05:00 |
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Thomas Harte
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74e98fd097
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Made an attempt to write actual data (albeit that CRC calculation is still missing).
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2016-12-25 19:18:45 -05:00 |
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Thomas Harte
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98be6ede45
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Shuffled a little to reduce risk of overflow, ensured writing is a loop, still seem to be writing too quickly for some reason.
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2016-12-25 16:13:05 -05:00 |
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Thomas Harte
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d2ad2c756e
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Added enough shovelling to write rubbish for an entire sector.
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2016-12-25 15:46:49 -05:00 |
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Thomas Harte
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aceb7e3b6b
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Started implementing write sector on the 1770, immediately deciding it would be useful to have a callback for end-of-queued-data-written from disk controller. So had a go at implementing that, naively. More investigation required.
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2016-12-25 12:31:38 -05:00 |
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Thomas Harte
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901f19f89c
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Added enough stuff that SSDs attached to a 1770 will now reach the entry point for writing.
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2016-12-25 09:46:12 -05:00 |
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Thomas Harte
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c304db0f5a
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Deintegrated the busy flag and the interrupt request line, as the latter is reset by status reads. Which also means I can start reporting the WD INTRQ line status directly from the Microdisc. That appears to be correct, rather than honouring the Microdisc IRQ select there.
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2016-12-06 21:16:29 -05:00 |
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Thomas Harte
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ca50606e1d
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Restored Vic audio.
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2016-12-03 17:10:47 -05:00 |
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Thomas Harte
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36bc558798
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Converted all 'Components' to postfix underscores.
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2016-12-03 10:51:09 -05:00 |
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Thomas Harte
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81ee834530
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As well as a bunch of logging, reinstated rotation position preservation across tracks.
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2016-12-02 18:36:47 -05:00 |
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Thomas Harte
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93c573bfa9
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Implemented missing status bits (other than the index hole), and a head loading delay for the Microdisc.
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2016-12-01 21:13:16 -05:00 |
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Thomas Harte
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0a0775c3bd
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Removed earlier hacky solution.
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2016-12-01 20:16:11 -05:00 |
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Thomas Harte
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442986ee2c
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Introduced a head loading path for 1793 machines.
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2016-12-01 20:12:22 -05:00 |
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Thomas Harte
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82899f2f47
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Ensured flag setting is atomic, removed duplication of interrupt request versus busy, found better names for the personality testers, unified delegate protocol.
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2016-12-01 07:41:52 -05:00 |
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Thomas Harte
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b31fd11470
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Fixed reporting of data request line, initial status values.
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2016-11-30 22:39:55 -05:00 |
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Thomas Harte
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2222cb65d6
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Split the status up into flags, assembled into a register upon demand. Attempted to implement some of the differences between the 1770/1772 and 1773/1793. Albeit with a motor fix still in place.
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2016-11-30 22:26:02 -05:00 |
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Thomas Harte
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84cb07613d
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Checked some documentation more thoroughly; the 1793 has quite different spin-up (/head load) semantics. So it's another distinct personality. Grrr.
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2016-11-27 20:39:08 -08:00 |
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Thomas Harte
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02ba1f220f
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The '72 seems to be a '70 with altered timing. So worth differentiating.
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2016-11-27 21:06:17 +08:00 |
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Thomas Harte
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2c01f9dbed
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Added meaningful TODOs.
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2016-11-27 08:42:39 +08:00 |
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Thomas Harte
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2f459690d4
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It would appear the 1770 and 1773 actually differ in relation to the (non-sensical) ability not to spin-up for a Type 2, and whether a side compare can occur. So the WD1770 class now requires a personality to be specified. Which it singly fails to honour.
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2016-11-26 23:29:30 +08:00 |
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Thomas Harte
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d8ecc52de8
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Temporarily disabled spin-down as harmful to the status register if following anything other than a Type 1 command.
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2016-11-26 22:27:20 +08:00 |
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Thomas Harte
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b9677c9927
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Consolidated interrupt request setting.
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2016-11-26 09:41:53 +08:00 |
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Thomas Harte
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d5f9e0aa3b
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Ensured there's no such thing as a zero-cycle operation, even if i don't yet know exactly what I should be doing.
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2016-11-25 21:24:25 +08:00 |
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Thomas Harte
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4af678d2ed
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Gave the Microdisc a clock signal, added just enough of force interrupt to avoid a spurious belief that a type 3 command has started.
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2016-11-25 20:51:39 +08:00 |
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Thomas Harte
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d4a1961378
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Added getters for the IRQ and DRQ lines plus a delegate to receive changes; adjusted code so that the two lines signal.
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2016-11-21 13:21:49 +08:00 |
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Thomas Harte
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7eeaac23e7
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Reversed myself. I once again do not think the clock is divided by 256 for envelopes.
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2016-11-11 20:31:48 -05:00 |
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Thomas Harte
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77987bf31e
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Decided to go with divide by 256 for the envelope counter after all.
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2016-11-09 21:51:56 -05:00 |
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Thomas Harte
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77ce200fbb
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Simplified/corrected AY tone/noise mixer logic, and made a new guess at the effect of reading registers that are smaller than 8 bits.
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2016-11-09 21:21:17 -05:00 |
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Thomas Harte
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fa65cc2058
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Resolved type conversion error.
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2016-11-05 12:57:01 -04:00 |
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Thomas Harte
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30c670f8de
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Ensured programmatic setting of the timers occurs during phase 2 _instead_ of counting.
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2016-11-04 21:30:18 -04:00 |
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Thomas Harte
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21604376e6
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Reintroduced clocking of the AY and boxed in the range of the master divider a little further.
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2016-10-30 22:51:08 -04:00 |
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Thomas Harte
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ad00304e8a
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Fixed 6522 countdown.
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2016-10-28 21:05:42 -04:00 |
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Thomas Harte
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4fab794747
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Added a direct-to-two-cycles emulation path for 6522 owners.
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2016-10-27 21:13:25 -04:00 |
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Thomas Harte
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2eda0b3c86
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Attempted to simplify the logic behind the most common 6522 usage.
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2016-10-27 21:06:31 -04:00 |
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Thomas Harte
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fd823dc222
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Settled on terminology.
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2016-10-23 20:42:49 -04:00 |
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Thomas Harte
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b12f2f2796
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Switched to more straightforward version of two-step loop, dealing with my mistaken dealing of when _master_divider&15 == 0 upon entry without adding an extra sanity check. Am also temporarily on non-modulo logic for tone generation, for a profiling test.
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2016-10-23 20:32:48 -04:00 |
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Thomas Harte
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583db88299
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Added a dispatch queue-powered Apple implementation of the async task queue, removed any mention of skip_samples in the AY since it isn't implemented.
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2016-10-22 21:58:45 -04:00 |
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Thomas Harte
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33e628a096
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Made an attempt to eliminate what amounts to manual division.
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2016-10-21 22:16:44 -04:00 |
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Thomas Harte
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46a3c0922f
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Slightly simplified code, fixed divider.
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2016-10-21 22:12:44 -04:00 |
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Thomas Harte
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d7c0c49715
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Might as well be consistent with divider loads.
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2016-10-21 20:07:14 -04:00 |
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Thomas Harte
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782ef960e1
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Sought both to [start to] optimise the AY and correct divider reloads. It turns out that conditionals aren't that troubling. But I can probably eliminate the counters.
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2016-10-21 20:05:38 -04:00 |
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Thomas Harte
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cd59eb5f43
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Implemented non-linear volume.
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2016-10-19 23:07:51 -04:00 |
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Thomas Harte
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b59da7d4bc
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Added some documentation.
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2016-10-19 22:47:44 -04:00 |
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