Thomas Harte
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cf37e9f5de
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Remove source control markers.
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2019-10-20 23:40:51 -04:00 |
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Thomas Harte
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e4f7ead894
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Merge branch 'AtariST' of github.com:TomHarte/CLK into AtariST
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2019-10-20 23:40:01 -04:00 |
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Thomas Harte
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4134463094
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The ACIA now receives bits.
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2019-10-20 23:34:30 -04:00 |
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Thomas Harte
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83d73fb088
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The keyboard now responds to a reset on its serial line.
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2019-10-20 23:13:44 -04:00 |
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Thomas Harte
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cf07982a9b
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Ensures good serial line and ACIA behaviour.
Next stop: having the intelligent keyboard react.
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2019-10-20 22:10:05 -04:00 |
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Thomas Harte
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2e86dada1d
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Ensures updates even when the event queue is empty.
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2019-10-20 20:38:56 -04:00 |
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Thomas Harte
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696af5c3a6
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Starts to transfer serial line decoding logic into the line itself.
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2019-10-20 20:38:56 -04:00 |
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Thomas Harte
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9a8352282d
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Mostly but not quite fixes serial work.
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2019-10-20 20:38:55 -04:00 |
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Thomas Harte
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34075a7674
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Attempts to tie an intelligent keyboard to the other end of its serial line.
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2019-10-20 20:38:55 -04:00 |
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Thomas Harte
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d461331fd2
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Ensures remaining_delays_ is set properly after [reset/flush]_writing.
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2019-10-20 20:38:55 -04:00 |
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Thomas Harte
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374439693e
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Ensures serial lines know their writer's clock rate.
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2019-10-20 20:38:55 -04:00 |
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Thomas Harte
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4e5b440145
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Attempts mostly to implement 6850 output.
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2019-10-20 20:38:55 -04:00 |
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Thomas Harte
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2bd7be13b5
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Decodes the 6850 control register, and starts working on standardised serial ports.
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2019-10-20 20:38:55 -04:00 |
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Thomas Harte
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e095a622d3
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Ensures updates even when the event queue is empty.
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2019-10-17 23:59:43 -04:00 |
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Thomas Harte
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9ab49065cd
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Starts to transfer serial line decoding logic into the line itself.
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2019-10-17 23:34:39 -04:00 |
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Thomas Harte
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f5a2e180f9
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Mostly but not quite fixes serial work.
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2019-10-16 23:34:37 -04:00 |
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Thomas Harte
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0fd8813ddb
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Attempts to tie an intelligent keyboard to the other end of its serial line.
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2019-10-16 23:21:14 -04:00 |
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Thomas Harte
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3b165a78f2
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Ensures remaining_delays_ is set properly after [reset/flush]_writing.
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2019-10-13 21:39:25 -04:00 |
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Thomas Harte
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f86dc082bb
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Ensures serial lines know their writer's clock rate.
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2019-10-13 20:41:08 -04:00 |
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Thomas Harte
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8b50a7d6e3
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Attempts mostly to implement 6850 output.
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2019-10-12 23:14:29 -04:00 |
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Thomas Harte
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4bf81d3b90
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Decodes the 6850 control register, and starts working on standardised serial ports.
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2019-10-12 18:19:55 -04:00 |
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