Thomas Harte
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e4459b6256
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Adds power-on bit to speed register.
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2020-10-30 21:50:39 -04:00 |
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Thomas Harte
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2be817a6a1
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Maps in "the interrupt ROM addresses".
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2020-10-30 21:42:43 -04:00 |
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Thomas Harte
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a833bb892b
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Increases logging substantially.
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2020-10-30 20:11:55 -04:00 |
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Thomas Harte
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0d562699a2
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Ensures unmapped regions are really unmapped.
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2020-10-29 22:18:01 -04:00 |
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Thomas Harte
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034056d0cd
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Adds full 8-bit clock addressing; stubs clock into the IIgs.
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2020-10-29 21:38:36 -04:00 |
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Thomas Harte
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5a8b8478d2
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Corrects unhandled IO assert.
The IIgs proper is actually waiting on communication with the RTC.
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2020-10-28 22:14:02 -04:00 |
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Thomas Harte
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6c54699c44
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Connects up an SCC.
Thereby putting my IIgs into its first perpetual loop. Trying to do something with the SCC I haven't implemented yet perhaps?
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2020-10-28 22:07:34 -04:00 |
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Thomas Harte
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94a6da6b7d
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Exposes much of the auxiliary and language card stuff to the IIgs bus.
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2020-10-28 21:58:20 -04:00 |
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Thomas Harte
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885fae1534
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Stubs in a speed register.
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2020-10-28 21:23:45 -04:00 |
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Thomas Harte
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1e4679ae14
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Corrects JSL and RTL .
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2020-10-28 17:25:40 -04:00 |
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Thomas Harte
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267dd59a59
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Gets as far as seemingly yet another memory-map setting.
Tomorrow, maybe?
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2020-10-27 22:31:58 -04:00 |
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Thomas Harte
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0a91ac5af5
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Adds some extra notes, starts getting into trying to run the IIgs.
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2020-10-27 22:09:45 -04:00 |
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Thomas Harte
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ad93ad6018
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Attempts to finish off shadowing.
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2020-10-27 22:05:04 -04:00 |
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Thomas Harte
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0c700094ea
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Goes branchless on shadowing.
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2020-10-27 21:56:03 -04:00 |
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Thomas Harte
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20631a157b
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Contorts somewhat in pursuit of branchless shadowing regardless of page and without extra storage.
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2020-10-27 21:37:39 -04:00 |
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Thomas Harte
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e44f95a882
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Takes a first, faltering shot at shadowing.
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2020-10-27 19:49:47 -04:00 |
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Thomas Harte
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31cd45f8b5
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Takes a run at set_card_paging and simplifies method of shadowing.
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2020-10-27 19:33:47 -04:00 |
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Thomas Harte
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74f9f6ad3b
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Tests and corrects ROM access beyond bank $00.
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2020-10-27 19:02:15 -04:00 |
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Thomas Harte
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1dfdb51e61
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Hits a few other easy cases.
Still to do: card paging, and finding out which banks that applies to, and shadowing. So: everything with flags.
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2020-10-26 21:49:47 -04:00 |
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Thomas Harte
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18832dc19d
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Attempts to expand the language card stuff to all affected pages.
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2020-10-26 20:30:41 -04:00 |
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Thomas Harte
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3dee0666cb
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Corrects current bank $00 language card behaviour.
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2020-10-26 17:46:40 -04:00 |
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Thomas Harte
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f830f6a57a
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Adds failing test of initial ROM mirroring.
It's the end of the evening, so this is it for today.
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2020-10-25 22:13:54 -04:00 |
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Thomas Harte
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82c733c68c
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Adds some very basic actual tests.
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2020-10-25 21:40:50 -04:00 |
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Thomas Harte
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ed510409c4
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Starts memory map test class, already finding a typo.
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2020-10-25 21:31:21 -04:00 |
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Thomas Harte
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7614eba4bf
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Factors out the IIgs memory map logic.
As testing would be rational.
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2020-10-25 21:10:04 -04:00 |
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Thomas Harte
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13c8032465
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ROM isn't writeable. The clue is in the name.
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2020-10-25 18:29:17 -04:00 |
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Thomas Harte
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44fc08cd5b
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Switches to a mapping system that supports non-continuous regions, and is smaller.
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2020-10-25 18:28:32 -04:00 |
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Thomas Harte
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ddd84db510
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Edges towards a functioning IIgs memory map.
Next up: making sure language and auxiliary switches apply. That should get something from the ROM.
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2020-10-23 19:41:10 -04:00 |
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Thomas Harte
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817f93a490
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Edges towards a working memory subsystem. At least structurally.
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2020-10-22 19:25:04 -04:00 |
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Thomas Harte
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43611792ac
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Adds just enough to get a 65816 ticking over.
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2020-10-21 21:19:18 -04:00 |
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Thomas Harte
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5287c57ee0
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Adds the IIgs as a user-selectable machine.
Albeit that there is no underlying machine yet.
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2020-10-20 22:18:11 -04:00 |
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