Thomas Harte
18798c9886
Corrects joystick memory leaks.
2017-10-15 20:49:47 -04:00
Thomas Harte
7aaf27389c
Commutes the Atari 2600 to the JoystickMachine interface.
2017-10-15 20:44:59 -04:00
Thomas Harte
ee179aa7bd
Introduces a joystick analogue to the shared keyboard interface, and implements it for the Vic-20.
2017-10-14 22:36:31 -04:00
Thomas Harte
3a05ce36de
Adds a reference to the calling keyboard in reset_all_keys.
2017-10-14 22:07:11 -04:00
Thomas Harte
4f289ab10b
Corrects some deficiencies in Vic-20 keyboard mapping.
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... albeit without yet being clear on the wiring behind restore.
2017-10-12 22:33:00 -04:00
Thomas Harte
78ee46270b
Transfers possession of keyboard mappings from the Mac side over to individual machines.
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Specifically by establishing an intermediate representation of a useful mix between the American and British IBM and Mac keyboard layouts, and routing through that.
2017-10-12 22:25:02 -04:00
Thomas Harte
97a2be71e3
Introduces flush_tracks to Drive, while switching its interface to using Track::Address and adjusting associated integer types.
2017-10-06 21:45:12 -04:00
Thomas Harte
edb9fd301c
Begins this project's conversion to functional-style casts.
2017-10-03 22:04:15 -04:00
Thomas Harte
698e4fe550
Tidies the Disk file hierarchy.
2017-09-22 22:39:23 -04:00
Thomas Harte
da082673d7
Drives now have a finite number of heads.
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The Amstrad volunteers itself to be single sided. Everything else stays as it was.
2017-09-15 21:18:36 -04:00
Thomas Harte
42616da7ff
Adjusts the Oric Microdisc to propagate motor control more widely.
2017-09-11 22:15:54 -04:00
Thomas Harte
2f13517f38
Adjusts the 1770 not to talk directly to the drive about motor status.
2017-09-11 22:10:56 -04:00
Thomas Harte
fb9fd26af7
Updates the 1540 for the slightly-more modern world of decoupled drives and disks (!).
2017-09-11 22:08:10 -04:00
Thomas Harte
d3c385b471
Separates the 8272's drive selection signalling from actual drive ownership.
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Thereby returns working motor control to the CPC.
2017-09-11 21:25:26 -04:00
Thomas Harte
96bf133924
Withdraws requirement for DiskController users to specify a PLL multiplier or to provide rotation speed.
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In the latter case because it's no longer of any interest to the controller, and in the former because I'd rather it be picked automatically.
2017-09-10 22:56:05 -04:00
Thomas Harte
0622187ddf
Strips Controller of all capabilities now housed on the Drive.
2017-09-10 19:23:23 -04:00
Thomas Harte
90c7056d12
Started devolving timed event loop logic down to the drives, moving them closer to modelling real life.
2017-09-10 14:43:20 -04:00
Thomas Harte
3b12fca417
Corrects non-recurring-pattern adaptation bug: the 'SerialPortVIA' should keep a reference to its VIA, not a copy of it.
2017-09-05 21:19:56 -04:00
Thomas Harte
8eeb7e73cd
Adds a commented-out printf that I might like to use again later.
2017-09-05 21:15:56 -04:00
Thomas Harte
6547102511
Attempts better to hide C1540 implementation details from the reader.
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In this case not from the compiler, as it's desireable to keep `run_for` as a non-virtual call, and therefore everything else comes alone for the ride.
2017-09-04 20:58:00 -04:00
Thomas Harte
a49594c6a3
Tweaks Vic20 Machine parent class order so that when turned into a CRTMachine, still successfully dynamically casts as a ConfigurationTarget.
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More thorough thought is required.
2017-09-04 20:56:00 -04:00
Thomas Harte
a42ca290cb
Reformulates the Oric more cleanly into the modern world.
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Specifically: now that the implementation is contained within the CPP file, there's no need to embed the keyboard, tape player and VIA port handler as private classes. Also the pain of additional syntax is reduced, so the keyboard has been bumped up to a fully data-hiding class. I've also transferred overall ownership of the tape player, AY and keyboard up to the Oric itself, with the VIA merely being wired to them, and added a whole bunch of extra documentation.
2017-09-04 18:22:14 -04:00
Thomas Harte
da09098e49
Updates clipped area per latest CRT response to vertical sync.
2017-09-04 17:51:02 -04:00
Thomas Harte
24b3faa427
Deconstitutes the 6522 into component parts, templated and non-templated.
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Adjusts the Oric, Vic-20 and C-1540 accordingly, albeit with the quickest possible solutions.
2017-09-04 14:26:04 -04:00
Thomas Harte
96648df5fe
Ensures all parts of the Electron have a fully-defined initial state.
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Specifically to resolve an error with shift being pressed at startup due to a failure to establish a default value for that flag, but applying the same principle across the board.
2017-08-31 22:29:24 -04:00
Thomas Harte
53a88a7e12
Causes the ZX80/81 to omit support for the wait line if being configured as a ZX80.
2017-08-27 16:45:36 -04:00
Thomas Harte
4a66dd9e82
Arranges for the ZX80/81 to get a peek at target configuration prior to construction. I'm as yet undecided on whether to make this the norm.
2017-08-27 16:42:16 -04:00
Thomas Harte
57bfec285f
Makes it optional whether the Z80 supports the wait line. If the wait line isn't in use, runtime costs are decreased because the optional wait cycles need not be iterated over.
2017-08-26 23:08:57 -04:00
Thomas Harte
e7ad79c79a
Breaks apart the CPC's 6845 bus handler to obey phase 1 and phase 2, and now back-dates interrupts when appropriate.
2017-08-26 14:07:51 -04:00
Thomas Harte
6e99169348
Permits the 6845's bus state to be examined by an owner, eliminating the need to buffer it in the bus handler. But more than that it allows the CRTC to decide when it adjusts the various outputs respective to the main phase. So a net effect of the change is that the CPC now sees vsync a cycle earlier, because my current reading of the 6845 datasheet is that it is set at the end of phase 1, not the beginning of the next phase 1.
2017-08-26 12:59:59 -04:00
Thomas Harte
ee71be0e7e
Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable.
2017-08-21 21:56:42 -04:00
Thomas Harte
cde29c4bf4
Added forceinlines and properly declared finals and overrides.
2017-08-21 21:07:10 -04:00
Thomas Harte
e1aded0d95
Allows Z80 users to opt out of support for the bus request line. Which both now do.
2017-08-21 20:43:12 -04:00
Thomas Harte
0cbc1753b9
Quick fixes: the binary tape player now considers talk to the sleep observer only if motor control changes. The Amstrad CPC no longer attempts to use the component argument to identify the caller, since this will often be that of the superclass and not that of the derived class known to the CPC.
2017-08-20 13:18:46 -04:00
Thomas Harte
8f5ae4a326
The CPC now responds to tape-originating sleeper observations.
2017-08-20 12:21:02 -04:00
Thomas Harte
e88a51e75e
Worked logic all the way down to the CPC. If the 8272 announces that it is asleep, it is now no longer clocked. Also very slightly cut down on IRQ line chatter to the Z80.
2017-08-20 12:05:00 -04:00
Thomas Harte
f2699a3f2b
Okay, even if releasing it is unsafe, I can at least move the typer so that it is no longer called.
2017-08-20 10:24:01 -04:00
Thomas Harte
85253a5876
Sought further to reduce the processing footprint of palette changes by updating only those table entries that are affected by a change.
2017-08-20 10:13:23 -04:00
Thomas Harte
911ee5a0d3
At least added a fast return.
2017-08-19 22:22:51 -04:00
Thomas Harte
57c5b38a6d
Step one towards cutting much of this cost: build only the table that's appropriate for the current mode, and at least declare when a more minimal change would be sufficient.
2017-08-19 22:19:46 -04:00
Thomas Harte
f68565a33f
Split the static analyser functionality so that it's possible just to ask for the set of media implied by a particular file. Extended ConfigurationTarget so that media alone can be pushed to a machine.
2017-08-17 10:48:29 -04:00
Thomas Harte
b476f06524
Slowed the typer, having discovered that otherwise it has problems transitioning from a shifted to an unshifted character.
2017-08-16 22:12:16 -04:00
Thomas Harte
925e774015
Added a decent portion of documentation. But started feeling like I should address my various ownership decisions. Which would justify a separate pull request.
2017-08-16 16:23:33 -04:00
Thomas Harte
4c15e46fd1
Performed the normative removal from public view of Vic-20 implementation details. Which were hefty.
2017-08-16 16:05:30 -04:00
Thomas Harte
75208b0762
Moves the Electron implementation behind a more opaque interface, in line with changes elsewhere.
2017-08-16 15:33:40 -04:00
Thomas Harte
903a17ae11
Corrected typo and removed replication of what's already declared formally.
2017-08-16 14:53:03 -04:00
Thomas Harte
de1c526789
Cut the amount disclosed by the Atari 2600 for public inspection down to the minimum, relocating implementation into the .cpp.
2017-08-16 14:52:40 -04:00
Thomas Harte
148591b7f2
Hid most of the Oric innards, and corrected a potential multi-thread access error emanating from the Mac side of the world.
2017-08-16 14:35:53 -04:00
Thomas Harte
3c148f5721
Fixed clanger of an error.
2017-08-16 14:02:46 -04:00
Thomas Harte
360c8a99a3
Adjusted Atari2600 actually to use the nominated type of bus extender.
2017-08-16 12:57:32 -04:00
Thomas Harte
06e31f5102
Consequential to the 6502 change, severs the Atari 2600's cartridge container from its former attempt at runtime polymorphism, in favour of each cartridge's specific hardware being defined as a 'bus extender'.
2017-08-16 12:39:15 -04:00
Thomas Harte
42b5b66305
Remove the 6502's use of runtime polymorphism in favour of ordinary templating.
2017-08-16 11:56:52 -04:00
Thomas Harte
3947347d88
Introduces active input handling for the AY and uses it in the CPC to give proper, active keyboard input, rather than push-on-select, which was only ever a temporary hack. Also maps a few more keys for the Amstrad.
2017-08-15 22:47:17 -04:00
Thomas Harte
334872d374
Clarified, slightly.
2017-08-14 12:47:11 -04:00
Thomas Harte
7ea703f150
Started making provisions for a DMA-compatible implementation. Re: the CPC, it sounds like DMA acknowledge might be permanently wired, causing DMA mode seemingly to work from the 8272's point of view.
2017-08-14 08:38:00 -04:00
Thomas Harte
3831fbaca2
Ensured the ZX80 and '81 also provide the necessary hook for destruction.
2017-08-11 12:11:01 -04:00
Thomas Harte
1d8edf58dd
Ensured that a virtual destructor is declared, so that the various automatically-generated real constructors get in on the action.
2017-08-11 12:07:48 -04:00
Thomas Harte
4785e316ff
Now with exposition.
2017-08-11 11:36:03 -04:00
Thomas Harte
44da9de5b0
Tweaked typing timing expectations.
2017-08-11 11:35:28 -04:00
Thomas Harte
4ecd093891
Fixed test for termination of a key sequence; the previous error will have seen this reduce all multi-key sequences to just the one, and expand single-key sequences to "probably" two, posting an out-of-bounds code to the machine at completion.
2017-08-11 11:35:14 -04:00
Thomas Harte
dd4bc87d52
Fixed: should be a full-path #ifdef guard, given that this is one of the classes named relative to its namespace.
2017-08-11 11:21:33 -04:00
Thomas Harte
570d25214e
Made an initial attempt at typer support for the CPC.
2017-08-11 11:21:07 -04:00
Thomas Harte
cf810d8357
Minor: ensure the CRT is set to output as a monitor.
2017-08-10 14:42:47 -04:00
Thomas Harte
4961fda2a9
Ensured counter-intuitive CRTC writes get through, taking the opportunity to correct my handling of port IO in general: selecting multiple devices for input results in a logical AND (i.e. open collector mode), and both the CRTC and gate array will receive data from 'input's if applicable.
2017-08-10 12:39:19 -04:00
Thomas Harte
6a6e5ae79c
Forced users of the 6845 to be explicit about which type. So far with no effect.
2017-08-10 12:28:57 -04:00
Thomas Harte
484524d781
Implements RAM paging. The 6128 is now emulated.
2017-08-08 16:01:56 -04:00
Thomas Harte
a7103f9333
Disks are now communicated to the 8272. Which is able to handle four of them.
2017-08-06 13:24:14 -04:00
Thomas Harte
29288b690e
Switched disk controllers to be instantiated explicitly in terms of cycles, created an Amstrad-specific subclass of the 8272 to record the direct programmatic availability of all disk motors bundled together, and otherwise adjusted to ensure the thing is clocked and that the motor is enabled and disabled appropriately. The 8272 is also now formally a subclass of the incoming MDM controller.
2017-08-06 09:45:16 -04:00
Thomas Harte
3e984e75b6
Strung up an empty shell that eventually should contain the 8272, and added appropriate IO decoding to the Amstrad.
2017-08-05 19:45:52 -04:00
Thomas Harte
9e8645ca7a
Fixed ROM paging port decoding. It should have been fd00 if completely decoded, not df00, but also shouldn't be completely decoded.
2017-08-05 19:24:03 -04:00
Thomas Harte
caf3ac0645
Sought: (i) to instruct the CPC that it should be a 664, not a 464, if given a disk image (at least until I have RAM paging implemented for a 6128); (ii) to support ROM selection within the CPC and allow paging in of AMSDOS.
2017-08-05 19:20:38 -04:00
Thomas Harte
4b19cf60df
Added omitted semicolon.
2017-08-05 09:18:55 -04:00
Thomas Harte
b3788fed41
Fixed AY queuing behaviour as handled by the Amstrad. I think I need to come up with clearer semantics here.
2017-08-05 09:12:17 -04:00
Thomas Harte
a63aa80dc9
Merge branch 'master' of github.com:TomHarte/CLK
2017-08-04 16:51:52 -04:00
Thomas Harte
63f57c8c4f
Adjusted visible portion of frame; completely empirical, as I'm chasing a machine that shipped with a monitor.
2017-08-04 16:51:46 -04:00
Thomas Harte
f075fea78c
Introduces filtering of the CRTC's vsync signal into the gate array.
2017-08-04 16:36:55 -04:00
Thomas Harte
c0f0c68f4f
Corrects quick-hack version of border drawing: the assumption that the colour must be the same over a plotted period. Also corrects my entry for colour 15.
2017-08-04 12:13:05 -04:00
Thomas Harte
d9097facf1
Found documentation that makes more sense, and in practice seems to be more correct: the test after vertical sync is for greater than 32, not less. Also I decided to chance my arm on counter reset also resetting interrupt request. The raster effects of Ghouls 'n' Ghosts is now pretty much correct but one line off. I think probably either something is off in my wait-two logic on the post-vsync timer event, or possibly the vsync bit exposed via the PPI doesn't mean exactly what I think it means.
2017-08-04 08:56:09 -04:00
Thomas Harte
b927500487
Clarified code a little, but this is mostly fiddling in the margins.
2017-08-03 22:00:30 -04:00
Thomas Harte
e71eabedf9
Fixed timer clearing tet.
2017-08-03 21:30:04 -04:00
Thomas Harte
33ed27c3ad
Minor tidiness: included missing headers, and spaced out the ROM type and key lists for readability.
2017-08-03 12:45:42 -04:00
Thomas Harte
575b1dba75
Formally declared the ZX80/81 and Amstrad CPC as keyboard machines in their public interface. Which means not having to repeat the meaning of set_key_state and clear_all_keys. So: a minor DRY improvement.
2017-08-03 12:38:22 -04:00
Thomas Harte
bbb17acf3a
Expanded interface so that an external machine caller can request a string be typed without any knowledge of whatever it intends to do re: CharacterMappers. Which is immediately useful in paste functionality.
2017-08-03 11:50:50 -04:00
Thomas Harte
ad3a98387f
Within the Typer framework: hatched out CharacterMapper as a distinct thing from the target for keypresses, better to formalise responsibility but also to make it easy cleanly to sever that stuff into its own little part.
2017-08-03 11:42:31 -04:00
Thomas Harte
2f2071be8a
These should actually both be in the public header, as the types are used in an exposed method.
2017-08-02 22:18:30 -04:00
Thomas Harte
6d510e4e70
Made it no longer public knowledge that any sort of Typer is involved in being a ZX80/81.
2017-08-02 22:17:22 -04:00
Thomas Harte
8e0736fbe6
Reinstated typing ability, albeit with an ugly inline insertion. But I think I can defer dealing with typers to another pull request. The whole issue of keyboard mapping probably needs reappraisal.
2017-08-02 22:16:09 -04:00
Thomas Harte
681d1e2f8d
Breaking its typer for now, adapted the ZX80/81 to having a Z80, not being one.
2017-08-02 22:12:59 -04:00
Thomas Harte
42e70ef993
Adjusted slightly as per Z80 change, and to pull everything internally declared into the Amstrad CPC namespace.
2017-08-02 22:11:03 -04:00
Thomas Harte
d3bf8fa53b
Upped the documentation.
2017-08-02 20:37:26 -04:00
Thomas Harte
f5e2dd410e
Constrained output to the centre 90%.
2017-08-02 19:55:44 -04:00
Thomas Harte
e50adf1cc8
Were my TZX support up to it, this would likely be sufficient for tape emulation.
2017-08-02 13:50:14 -04:00
Thomas Harte
dcab10f53e
Ensured the AY's async queue doesn't just fill and fill.
2017-08-02 07:38:35 -04:00
Thomas Harte
f602f9b6ec
Adds an attempt to clock the AY.
2017-08-02 07:21:33 -04:00
Thomas Harte
4d5d5041df
Attempted to ensure a clean startup.
2017-08-01 22:18:42 -04:00
Thomas Harte
587eb3a67c
Factored interrupt counting out of the CRTCBusHandler.
2017-08-01 22:15:39 -04:00
Thomas Harte
8d39a20088
Added proper output of mode 3, were anything ever to try to use it.
2017-08-01 21:51:41 -04:00
Thomas Harte
4b6370eb86
Realised my colour error: mapping the ROM numbers as though they were the hardware numbers. Having fixed that, spotted that I was deserialising R and B the wrong way around and dividing by too much. Colours now appear to be correct.
2017-08-01 21:47:52 -04:00
Thomas Harte
c6e340a8a2
Wired up the vsync signal. Pen 15 no longer flashes like crazy. Still can't figure out why the palette is so askew; was looking for perhaps some sort of detection of a green screen rather than a colour one, but there's no obvious input for that.
2017-08-01 21:21:59 -04:00
Thomas Harte
31c7153301
Corrected bit to colour mapping for modes 0 and 1. The total palette is still way off but there's consistency between modes now.
2017-08-01 20:52:42 -04:00
