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Commit Graph

5928 Commits

Author SHA1 Message Date
Thomas Harte
bc9eb82e6f Adds in VIA access decoding, and a note to self on video.
The Mac now proceeds to try to talk to the IWM.
2019-05-04 14:23:37 -04:00
Thomas Harte
29fc024ecd Starts negotiating the Macintosh memory map. 2019-05-04 12:33:27 -04:00
Thomas Harte
c1695d0910 Adds various notes to self. 2019-05-03 23:55:28 -04:00
Thomas Harte
6d6a4e79c9 Adds the absolute basics to include a 6522 in the Macintosh.
Not yet wired to anything.
2019-05-03 23:40:22 -04:00
Thomas Harte
417a3e1540 Adds missing call to flush. 2019-05-03 23:31:12 -04:00
Thomas Harte
fa8c804d47 Makes explicit a few implicit type conversions.
There's plenty more down this well, alas.
2019-05-03 23:26:03 -04:00
Thomas Harte
68392ce6f5 Adds enough of a concept of Mac video to get a properly initialised display.
Completely empty at present, naturally. Also this is the very first time I've run my 68000 at live speed. From just one data point, it's not terrible. Phew!
2019-05-03 23:25:42 -04:00
Thomas Harte
6873f62ad8 Ensures that the Mac now retains its ROM properly. 2019-05-03 22:39:09 -04:00
Thomas Harte
5f385e15f6 Adds the bare bones necessary to be able to create a Macintosh from File -> New... . 2019-05-03 22:16:07 -04:00
Thomas Harte
8c5d37b6ee Refactors the AppleII into a sub-namespace to make room for other Apple machines. 2019-05-03 18:14:10 -04:00
Thomas Harte
9c3c2192dd
Merge pull request #611 from TomHarte/68000
Adds an Initial Emulation of the 68000
2019-05-03 15:08:24 -04:00
Thomas Harte
4f9f73ca81 Corrects tests affected by change in run_for_instructions semantics and new program base address. 2019-05-03 15:05:14 -04:00
Thomas Harte
2c9a1f7b16 Restores vector. 2019-05-03 14:50:07 -04:00
Thomas Harte
0ea4c1ac80 Evicts #includes from my namespace. 2019-05-03 14:48:39 -04:00
Thomas Harte
a873ec97eb Also previously missing: vector.h. 2019-05-03 14:43:31 -04:00
Thomas Harte
cc8a65780e Adds further missing includes. 2019-05-03 14:42:36 -04:00
Thomas Harte
c117deb43b Introduces a couple of missing #includes. 2019-05-03 14:37:05 -04:00
Thomas Harte
ae31d45c88 Introduces the 68000 to SConstruct. 2019-05-03 14:31:09 -04:00
Thomas Harte
a0eb20ff1f Tweaks divide-by-zero timing. 2019-05-03 14:29:36 -04:00
Thomas Harte
34fe9981e4 Added necessary mea culpas. 2019-05-03 14:25:25 -04:00
Thomas Harte
291e91375f Takes a shot at the synchronous bus. 2019-05-03 14:20:59 -04:00
Thomas Harte
857f74b320 Fixed: the accepted interrupt level now appears on the bus. 2019-05-02 15:47:12 -04:00
Thomas Harte
1d9608efc7 Alters the order of interrupt bus activity, to bring it into line with a real 68000. 2019-05-02 15:25:43 -04:00
Thomas Harte
93616a4903 Completes test of a vectored interrupt.
Correcting issues uncovered.
2019-05-02 00:00:09 -04:00
Thomas Harte
bb07206c55 Corrects internet response to work as currently implemented.
Also makes corrections to the bus error and address error exceptions.
2019-05-01 21:59:06 -04:00
Thomas Harte
2e5c0811e7 Makes some effort at getting into interrupt processing. 2019-05-01 15:26:36 -04:00
Thomas Harte
f6ac407e4d Takes further steps towards supporting interrupts.
Specifically:
* introduces the necessary bus signalling; and
* adds corresponding functional steps.

Still to figure out: getting into and out of an interrupt cycle.
2019-05-01 15:19:24 -04:00
Thomas Harte
078c3135df The 5/3 split of microcycles appears not accurately to model when lines are tested.
Therefore I've reverted to a more normative 4:4 form.
2019-04-30 22:09:13 -04:00
Thomas Harte
92568c90c8 Adds support for HALT as an input, and puts some effort into how to calculate E. 2019-04-30 22:07:48 -04:00
Thomas Harte
f1879c5fbc Corrects interrupt level test within STOP. 2019-04-30 19:32:35 -04:00
Thomas Harte
31bb770fdd Implement STOPpages, waits for DTack, and bus and address error exceptions. 2019-04-30 19:24:22 -04:00
Thomas Harte
e430f2658f Adds a test and by that means fixes divide-by-zero exception return addresses. 2019-04-29 23:09:50 -04:00
Thomas Harte
3060175ff5 Eliminates constructions of std::tuple for performance reasons.
Specifically: reduces 68000 construction time from 10+ seconds to more like 2.8.
2019-04-29 22:43:15 -04:00
Thomas Harte
eb4233e2fd Joins some commonalities, shaving about 150 lines of code. 2019-04-29 22:37:23 -04:00
Thomas Harte
6b4c656849 Reverses order of instruction instantiation, reducing total bus step heft by about 11%.
... since that means inserting more complicated instructions before simpler ones in general, making subset finds more likely.
2019-04-29 22:20:18 -04:00
Thomas Harte
1b8fada6aa Restores accidentally-cropped functionality. 2019-04-29 22:10:00 -04:00
Thomas Harte
7332c64964 Improves testing of function as distinct from timing. 2019-04-29 22:08:37 -04:00
Thomas Harte
977f9ee831 Takes a run at divide-by-zero exceptions and starts looking towards ways to improve startup time. 2019-04-29 22:08:16 -04:00
Thomas Harte
16fb3b49a5 It leads to a TODO, but implemented decoding and initial setup of STOPpages. 2019-04-29 19:30:00 -04:00
Thomas Harte
3da1b3bf9b Introduces storage for various bus inputs. 2019-04-29 19:22:05 -04:00
Thomas Harte
bc00856c05 Removed TODO; it appears this is just the standard stack frame. 2019-04-29 19:09:20 -04:00
Thomas Harte
52e3dece81 Improves exposition. 2019-04-29 19:07:14 -04:00
Thomas Harte
2c1d8fa18a Adds a check for instruction privilege violation, albeit that I think I need different bus steps. 2019-04-29 19:06:10 -04:00
Thomas Harte
3e34ae67f6 Implements support for the trace flag. 2019-04-29 19:02:59 -04:00
Thomas Harte
d6e16d0042 Adds a test of TOS 1.00, as far as it goes without meaningful hardware. 2019-04-29 18:04:57 -04:00
Thomas Harte
8e02d29ae6 Trims test to length of trace capture. 2019-04-29 17:56:49 -04:00
Thomas Harte
ceebecec8d Corrects zero and negative flags for EXT.w. 2019-04-29 17:54:33 -04:00
Thomas Harte
05d1eda422 Fixes crossed-over decoding of EORI and ORI. 2019-04-29 17:45:52 -04:00
Thomas Harte
31f318ad43 Fixes MOVE.bw #, (xxx).w. 2019-04-29 17:41:46 -04:00
Thomas Harte
270f46e147 Normalises CMPl. 2019-04-29 17:27:56 -04:00