6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-07-06 01:28:57 +00:00
Code Issues Projects Releases Wiki Activity
6,341 Commits 9 Branches 118 Tags 496 MiB
8b76d4007e
Commit Graph

1876 Commits

Author SHA1 Message Date
Thomas Harte
414b0cc234 Reintroduces sync write delay. 2020-01-02 23:36:11 -05:00
Thomas Harte
134e828336 Updates note to self. 2020-01-02 23:33:35 -05:00
Thomas Harte
455e831b87 Corrects bug whereby changing pixel mode mid-line will produce an improper amount of data. 2020-01-02 23:18:21 -05:00
Thomas Harte
42ccf48966 Judging by Pompey Pirates Menu 88, vsync should occur a line earlier, ending during line 0. 2020-01-02 20:16:28 -05:00
Thomas Harte
2f8078db22 Switches to should_log as a global when I'm hacking about. 2020-01-02 20:15:48 -05:00
Thomas Harte
23ed9ad2de Corrects application of negative relative scale. 2020-01-01 13:22:21 -05:00
Thomas Harte
017681a97c Now honours permitted mouse range. 2020-01-01 12:48:38 -05:00
Thomas Harte
90b899c00e Attempts to implement absolute mouse positioning mode. 
Along with mouse direction.
 2020-01-01 12:29:33 -05:00
Thomas Harte
c11fe25537 Merge branch 'master' into EnchantedWoods 2019-12-30 23:32:45 -05:00
Thomas Harte
0a12893d63 Shunts vsync back down to top of frame. 
It's guess after guess, basically.
 2019-12-30 23:01:31 -05:00
Thomas Harte
8e777c299f Switches to latching video interrupts until acknowledged. 
Seems to fix Cisco Heat, at least. I have no idea whether I'm latching the correct thing, whether IACK should clear both or only one, etc.
 2019-12-30 23:00:55 -05:00
Thomas Harte
e23d1a2958 Restores vsync active. 2019-12-29 22:03:36 -05:00
Thomas Harte
6449403f6a Corrects pending_events_ test for sequence points. 
Simplifies around as possible.
 2019-12-29 21:53:45 -05:00
Thomas Harte
c8fe66092b Attempts to correct insertion logic (and mostly bypasses it). 2019-12-29 21:42:41 -05:00
Thomas Harte
b33218c61e Fixes reload test, which really needs to sense the CRT-headed vsync output. 
i.e. not the one heading back to the CPU.
 2019-12-29 20:55:34 -05:00
Thomas Harte
8ce26e7182 Adds a delay on vsync visibility (i.e. as to generating an interrupt). 2019-12-29 19:03:08 -05:00
Thomas Harte
47068ee081 Ensures visible hsync end generates a sequence point. 2019-12-29 17:51:50 -05:00
Thomas Harte
214b6a254a Adds a delay on visibility of the hsync signal, and a test on address reload. 2019-12-29 17:37:09 -05:00
Thomas Harte
93f6964d8a Introduces some preliminary line length unit tests. 
Thereby fixes one potential issue with load_ toggling.
 2019-12-28 22:50:34 -05:00
Thomas Harte
13f11e071a Simplifies border colour change propagation. 
I'm not sure it was even technically correct as was.
 2019-12-28 10:45:10 -05:00
Thomas Harte
f7825dd2a2 Pulls out address reload position as a separate constant. 2019-12-28 10:36:50 -05:00
Thomas Harte
a9d1f5d925 Pulls out address reload as something I can position independently. 
Sadly receding it by 3 did not have the effect I was hoping for, of receding Enchanted Land's first register tweaking.
 2019-12-27 23:47:19 -05:00
Thomas Harte
2757e5d600 Removes untrue comment. 2019-12-27 22:51:11 -05:00
Thomas Harte
5026de9653 Rejigs the video stream to ensure shifter really is continuous. 
... and definitively to avoid potential buffer overruns. Or, at least, to have a mechanism in place definitively to avoid them. Which will be tested and debugged as necessary.

Also simplifies the colour burst and border/pixels selection logic.
 2019-12-27 22:47:34 -05:00
Thomas Harte
5fa8e046d8 It's inaccurrate to call this _the_ shifter. So don't. 2019-12-27 19:03:10 -05:00
Thomas Harte
de43e86310 Permits Vic-20 memory to be specified in banks; adds recognition of TheC64-style file tags to specify them. 2019-12-26 22:49:48 -05:00
Thomas Harte
a9a92de954 Adds a bunch of shout-outs for unimplemented behaviour. 2019-12-25 15:32:33 -05:00
Thomas Harte
a8ba3607b7 Adds (and disables) a minor additional piece of logging. 2019-12-24 21:43:39 -05:00
Thomas Harte
5068328a15 Fixes debugging output. 2019-12-24 19:15:58 -05:00
Thomas Harte
b2bed82da6 Switches to standard logging. 2019-12-23 22:00:40 -05:00
Thomas Harte
0dae608da5 Embraces std::make_[unique/shared] in place of .reset(new . 2019-12-23 21:31:46 -05:00
Thomas Harte
5456a4a39d Eliminates static where constexpra aren't class members; adds some if constexprs for clarity. 2019-12-22 13:42:24 -05:00
Thomas Harte
274867579b Deploys constexpr as a stricter const. 2019-12-22 00:22:17 -05:00
Thomas Harte
05d77d3297 Also deploys make_unique/shared to avoid type repetition. 2019-12-21 23:52:04 -05:00
Thomas Harte
e5440a4146 Hacks in a colour burst. 
With a major flaw: it's implicit. I think I need a minor rethink of various components here.
 2019-12-20 23:49:38 -05:00
Thomas Harte
47508d50a7 Wires through a composite video option for the ST. 
Which is great and all, except that I've not yet inserted a colour burst. So it's monochrome.
 2019-12-20 20:49:14 -05:00
Thomas Harte
3d83f5ab49 Ensures a proper size handoff and implements a ripple feature I happened to find a forum post about. 2019-12-19 22:58:07 -05:00
Thomas Harte
0007dc23b3 Eliminates bit 0 of the DMA address. 2019-12-19 22:44:21 -05:00
Thomas Harte
ed7f171736 Moves address reload to end of vertical sync. 
I have no information as to when it should be, so this is as valid a guess as any other.
 2019-12-19 22:20:43 -05:00
Thomas Harte
0e066f0f70 Removes 'done' TODO. 
For certain values of done.
 2019-12-19 22:19:59 -05:00
Thomas Harte
d85ae21b2f Adds an explicit declaration of chip type to all AY users. 2019-12-18 19:28:41 -05:00
Thomas Harte
c00ae7ce6a Adds a one-cycle delay on frequency changes. 2019-12-13 19:57:54 -05:00
Thomas Harte
4bcf217324 Ensures delayed loading isn't interrupted by blank, hsync. 2019-12-12 23:20:28 -05:00
Thomas Harte
f6f2b4b90f Removes double DE edge test. 2019-12-12 22:50:35 -05:00
Thomas Harte
95b5db4d87 Tweaks timings yet further, adds a FIFO reset. 
The accuracy of this may require further research.
 2019-12-11 23:22:20 -05:00
Thomas Harte
de4403e021 Corrects blank timing. 2019-12-10 22:17:57 -05:00
Thomas Harte
0a405d1c06 Introduces a latency between DE and load. 2019-12-10 21:24:15 -05:00
Thomas Harte
768b3709b8 Corrects audio clock rate. 2019-12-10 20:25:27 -05:00
Thomas Harte
a7cfb840ef Adds but presently disables a diagnostic for border elimination. 2019-12-08 22:34:42 -05:00
Thomas Harte
c785797da6 Adds a warning for unhandled reset. 2019-12-08 21:01:30 -05:00
Thomas Harte
0408592ada Switches to byte buffers and seeks to reduce unnecessary video flushing. 2019-12-08 20:20:13 -05:00
Thomas Harte
0ed87c61bd Introduces an explicit area of floating bus, starts adding bus errors. 2019-12-08 11:52:43 -05:00
Thomas Harte
08a27bdec7 NTSC frame length is correct; removes TODO. 2019-12-08 11:51:12 -05:00
Thomas Harte
894066984c Moves beginning and end of vertical sync to what I now believe is its proper place. 
At least one demo now successfully opens the top border.
 2019-11-19 20:13:47 -05:00
Thomas Harte
e787c03530 Slightly shortens NTSC frame. 
Either: (i) 263 is incorrect; or (ii) my logic as to frame height is incorrect. Given that the horizontal side of things is really well documented, I'm currently guessing (i). Research to do.
 2019-11-18 23:47:27 -05:00
Thomas Harte
c04d2f6c6e Restricts DTack delay to RAM and Shifter accesses. 2019-11-18 22:57:13 -05:00
Thomas Harte
6990abc0d3 Tweaks selected output mode when both BPP bits are set. 2019-11-18 22:56:40 -05:00
Thomas Harte
ade8df7217 Permits a delay on DE propagation back to the CPU. Plus tests. 
Currently set at 28 cycles, but I don't know.
 2019-11-18 22:12:24 -05:00
Thomas Harte
82c984afa4 Switches the joysticks around. 
Thereby finally allowing me to control mode games.
 2019-11-18 20:02:27 -05:00
Thomas Harte
1202b0a65f Establishes a pipeline for delayed public state visibility. 2019-11-17 23:28:00 -05:00
Thomas Harte
facc0a1976 Amps up the documentation. 2019-11-17 21:28:51 -05:00
Thomas Harte
253dd84109 Corrects accidental dropping of pixel residue. 
Specific issue: the repeated (start_column != end_column) test, which can no longer be correct if start_column has been incremented in the (x_&7) test.

The visible effect was to omit pixels from the output wave, which also affected observed sync timing.
 2019-11-17 18:34:13 -05:00
Thomas Harte
2c4f372872 Adds support for the .ST file format. 2019-11-12 23:23:14 -05:00
Thomas Harte
f4cfca0451 Merge branch 'master' of github.com:TomHarte/CLK 2019-11-12 19:38:44 -05:00
Thomas Harte
eb287605f7 Switches to a default of TOS 1.04. 2019-11-12 19:38:30 -05:00
Thomas Harte
6a82c87320 Withdraws border optimisation temporarily; I think I may be onto an output bug here. 2019-11-12 19:33:13 -05:00
Thomas Harte
f0478225f0 Adjusts logic to reduce number of output spans. 2019-11-12 19:30:28 -05:00
Thomas Harte
c6f6bc68e1 Undoes non-insertion of media. 2019-11-10 21:52:06 -05:00
Thomas Harte
ab34fad8ca Introduces a cleaner, separated shifter. 2019-11-10 21:39:40 -05:00
Thomas Harte
7ae0902103 Adds additional joystick commands to the dispatcher. 2019-11-09 20:10:54 -05:00
Thomas Harte
8e9428623e Adds joystick events to the Atari ST. 2019-11-09 18:39:22 -05:00
Thomas Harte
2c25135d8a Fixes const correctness for joystick machines; the ST is now one such. 2019-11-09 18:19:05 -05:00
Thomas Harte
860837d894 Corrects: KeyPad -> Keypad. Also fleshes out Atari ST keyboard mapping. 2019-11-09 18:02:14 -05:00
Thomas Harte
0204003680 Resolves GCC warnings. 2019-11-09 16:12:37 -05:00
Thomas Harte
77ef7dc8fc Shuffles ST and 2600 into a common parent. 2019-11-09 15:31:41 -05:00
Thomas Harte
e3abbc9966 Renames what didn't end up being a whole SerialPort. 2019-11-09 15:21:51 -05:00
Thomas Harte
70c6010fe0 Expands visible area and adds a few more safety barriers. 2019-11-09 15:00:42 -05:00
Thomas Harte
45375fb5d0 Makes endian aware. 2019-11-09 09:48:59 -05:00
Thomas Harte
d2324e413d Clarifies ownership of bpp-has-changed test. 2019-11-09 00:10:59 -05:00
Thomas Harte
e0c15f43bb Avoids massive over-flushing of pixel buffers. 2019-11-09 00:05:02 -05:00
Thomas Harte
8b0d550b81 Attempts to move vertical sync out to cycle 30. 2019-11-08 22:18:47 -05:00
Thomas Harte
d1259f829e Moves vertical state decisions back to cycle 502. 2019-11-08 21:42:05 -05:00
Thomas Harte
7caef46c05 Switches back to hsync for interrupts; corrects current address reads. 2019-11-08 21:25:28 -05:00
Thomas Harte
6902251d8b Fixed: returns video address in bytes, not words. 2019-11-08 20:47:08 -05:00
Thomas Harte
0b683b0360 Adds some sanity checks. 2019-11-08 20:46:24 -05:00
Thomas Harte
5d5dc79f2c Corrects raster race condition with CPU. 2019-11-07 23:27:05 -05:00
Thomas Harte
b7c407be10 The palette is meant to be read/write. 2019-11-07 23:11:06 -05:00
Thomas Harte
f45798faf0 Corrects initial safe value of line_length_. 2019-11-07 22:53:26 -05:00
Thomas Harte
7c66d7a13c Corrects sync and line-length latch timings. 2019-11-07 22:53:04 -05:00
Thomas Harte
5e1570258d I think the horizontal interrupt is blank, not sync. 2019-11-07 22:00:50 -05:00
Thomas Harte
fc8021c0b0 Adds a centre crop. 2019-11-07 20:02:45 -05:00
Thomas Harte
c9cd56915e Corrects typo that was adding an extra line of PAL video. 2019-11-07 19:55:49 -05:00
Thomas Harte
1fd19c5786 Attempts to add proper bus timing. 2019-11-07 19:55:00 -05:00
Thomas Harte
ce66b5fd9c Corrected member variable names. 2019-11-07 19:44:22 -05:00
Thomas Harte
8aa425c9d8 Fixes medium resolution mode. 2019-11-06 23:25:36 -05:00
Thomas Harte
ec68bc5047 Corrects output glitches: channel de sync and improper border beginnings. 2019-11-06 22:37:05 -05:00
Thomas Harte
0ce807805d Eliminates most masks, at least for now. 2019-11-05 23:17:59 -05:00
Thomas Harte
41f3c29e30 Attempts to switch to correct video state machine. 
Some glitches remain to be ironed out.
 2019-11-05 23:02:25 -05:00
Thomas Harte
8df1eea955 Goes big on flushing. 2019-11-03 23:03:50 -05:00
Thomas Harte
eeafdf2c03 Slightly expands list of recognised Intelligent Keyboard commands. 2019-11-03 21:58:15 -05:00
Thomas Harte
befe2c2929 Adds floppy drive activity indicators. 2019-11-03 21:57:54 -05:00
Thomas Harte
e9965c2738 Obeys stated memory size. 2019-11-03 21:18:17 -05:00
Thomas Harte
48b0d8c329 Adds bus req/ack to the DMA controller; hacks support into the ST. 2019-11-03 21:11:25 -05:00
Thomas Harte
4dbd2a805a Nudges closer to DMA support. 2019-11-03 17:24:36 -05:00
Thomas Harte
20bf425f98 Drive select lines are active low. 2019-11-02 23:37:56 -04:00
Thomas Harte
0567410bcf Attempts to start getting the WDC working. 2019-11-02 23:26:42 -04:00
Thomas Harte
6d1e09ba55 Connects up the AY to floppy drive/side selection. 2019-11-02 23:04:08 -04:00
Thomas Harte
f40dbefa67 Implements most of keyboard input. 2019-11-02 22:30:02 -04:00
Thomas Harte
f93cdd21de Reverses bit order. 
So, for the first time: a green desktop.
 2019-11-02 21:53:04 -04:00
Thomas Harte
e1dc3b1915 Reverses mouse buttons. 
So I can now navigate the disk-less GEM desktop and click on things.
 2019-11-02 21:38:57 -04:00
Thomas Harte
cbf25a16dc Adds relative mouse motion input. 2019-11-02 21:25:45 -04:00
Thomas Harte
bf7e9cfd62 Pulls the intelligent keyboard into its own file. 2019-11-02 19:47:44 -04:00
Thomas Harte
a67e0014a4 Fixes video base address and mono/colour monitor value. 
Now I see a GEM desktop. In blue.
 2019-11-02 19:36:15 -04:00
Thomas Harte
c070f2100c Attempts to regularise data bus access. 2019-11-01 23:01:06 -04:00
Thomas Harte
75e34b4215 Reacts to no acknowledgement. 2019-10-31 21:00:05 -04:00
Thomas Harte
731dc350b4 Adds sometime real-time clocking for DMA. 2019-10-30 22:59:32 -04:00
Thomas Harte
635e18a50d Ensures the MFP requests and receives real-time clocking when needed. 2019-10-30 22:42:06 -04:00
Thomas Harte
1c154131f9 Expands size of storage in Cycles/HalfCycles; adjusts widely to compensate. 2019-10-29 22:36:29 -04:00
Thomas Harte
1135576a3a Comments in slightly more detail. 2019-10-28 22:12:56 -04:00
Thomas Harte
1d790ec2a9 Adds the option for a clock conversion to JustInTimeActor and slows the MFP's clock rate. 2019-10-28 21:35:10 -04:00
Thomas Harte
0f2d72c436 Ensures receipt of output line changes. 2019-10-28 21:21:53 -04:00
Thomas Harte
4a1fa8fc13 Adds some const qualifiers. 2019-10-28 21:13:42 -04:00
Thomas Harte
95d3b6e79f Adds a through route for the FDC interrupt line. 2019-10-28 21:13:21 -04:00
Thomas Harte
d44734d105 Attempts a fuller setting of GPIP inputs. 2019-10-27 22:39:21 -04:00
Thomas Harte
1aaa6331a0 Stores and returns video mode. 2019-10-27 22:39:00 -04:00
Thomas Harte
0cb19421e8 Adds prefix to mouse position response. 2019-10-27 21:46:03 -04:00
Thomas Harte
92847037b3 Merge branch 'master' into AtariST 2019-10-27 21:40:51 -04:00
Thomas Harte
0fc191c87d Switched a few static_cast to constructor syntax. 2019-10-27 14:21:22 -04:00
Thomas Harte
dc4a0e4e3b Video only ever reads from RAM, so it can be const *. 
(it can also be *const, since I set it only once)
 2019-10-27 14:09:38 -04:00
Thomas Harte
36a9a5288b Adds drives to the FDC. 2019-10-26 22:39:11 -04:00
Thomas Harte
ac39fd0235 Starts work on the DMA controller. 2019-10-26 21:33:57 -04:00
Thomas Harte
ecc0cea5a1 Added a potential branch for the newer TOS memory map. 2019-10-26 16:52:06 -04:00
Thomas Harte
eae11cbf17 Adds a dummy response for mouse interrogation. 2019-10-26 16:14:24 -04:00
Thomas Harte
2207638287 Adds hsync and vsync interrupts. 2019-10-25 22:42:13 -04:00
Thomas Harte
872897029e Attempts a complete wiring of 68901 interrupts. 2019-10-25 22:36:01 -04:00
Thomas Harte
51b4b5551d Actually, I think the 6850 is active low for interrupts. 2019-10-24 22:37:53 -04:00
Thomas Harte
092a61f93e Does a better job of having just 512kb. 2019-10-21 23:10:30 -04:00
Thomas Harte
e30ba58e0d Attempts to wire ACIA interrupt signals into the MFP. 2019-10-21 23:02:30 -04:00
Thomas Harte
83d73fb088 The keyboard now responds to a reset on its serial line. 2019-10-20 23:13:44 -04:00
Thomas Harte
75c3e2dacd Adds basic, incomplete dispatcher for the intelligent keyboard. 2019-10-20 23:07:19 -04:00
Thomas Harte
cf07982a9b Ensures good serial line and ACIA behaviour. 
Next stop: having the intelligent keyboard react.
 2019-10-20 22:10:05 -04:00
Thomas Harte
313aaa8f95 Silences temporarily. 2019-10-20 20:38:56 -04:00
Thomas Harte
696af5c3a6 Starts to transfer serial line decoding logic into the line itself. 2019-10-20 20:38:56 -04:00
Thomas Harte
9a8352282d Mostly but not quite fixes serial work. 2019-10-20 20:38:55 -04:00
Thomas Harte
34075a7674 Attempts to tie an intelligent keyboard to the other end of its serial line. 2019-10-20 20:38:55 -04:00
Thomas Harte
ff62eb6dce The ACIA actually has two clocks, though on an ST they're both 500,000 Hz. 2019-10-20 20:38:55 -04:00
Thomas Harte
374439693e Ensures serial lines know their writer's clock rate. 2019-10-20 20:38:55 -04:00
Thomas Harte
c4ef33b23f JustInTimeActors can now specify a clock divider. 2019-10-20 20:38:55 -04:00
Thomas Harte
4e5b440145 Attempts mostly to implement 6850 output. 2019-10-20 20:38:55 -04:00
Thomas Harte
97d44129cb Ensures all 16 data lines reach the video. 2019-10-20 20:38:55 -04:00
Thomas Harte
b0f5f7bd37 Attempts to start producing actual video. 2019-10-20 20:38:55 -04:00
Thomas Harte
a59ec9e818 Provides a token something where DMA should be. 2019-10-20 20:38:55 -04:00
Thomas Harte
4ead905c3c Adds an empty shell for the ACIA. 2019-10-20 20:38:55 -04:00
Thomas Harte
127bb043e7 Adds enough logic to advance to an ACIA access error. 2019-10-20 20:38:55 -04:00
Thomas Harte
42ebe06474 Makes an attempt at tracking video sequence points. 2019-10-20 20:38:55 -04:00
Thomas Harte
74fe32da23 Takes a shot at other display outputs. 2019-10-20 20:38:55 -04:00
Thomas Harte
780916551f Corrects sync generation. 2019-10-20 20:38:54 -04:00
Thomas Harte
305b1211ba Makes a first attempt to box out the ST display area. 2019-10-20 20:38:54 -04:00
Thomas Harte
2cf52fb89c Makes an unsuccessful first attempt at some timer functionality. 2019-10-20 20:38:54 -04:00
Thomas Harte
6e1b606adf Adds a target for MFP read/write operations. 
Completely without any implementation, so far.
 2019-10-20 20:38:54 -04:00
Thomas Harte
3bb0bf9e14 Adds some semblance of an AY. 2019-10-20 20:38:54 -04:00
Thomas Harte
87a6d22894 Starts to formalise the ST memory map a little. 2019-10-20 20:38:54 -04:00
Thomas Harte
484a0ceeb8 Starts forming an Atari ST memory map. 2019-10-20 20:38:54 -04:00
Thomas Harte
da1436abd2 Gifts the Atari ST a 68000 and non-functional video. 2019-10-20 20:38:54 -04:00
Thomas Harte
125f781ced Starts to create an actual shell of a machine. 2019-10-20 20:38:54 -04:00
Thomas Harte
8b397626bf Adds a route through the static analyser to the Atari ST. 2019-10-20 20:38:54 -04:00
Thomas Harte
0da1881a07 Adds an Atari ST enumeration and factory method. 2019-10-20 20:38:54 -04:00
Thomas Harte
95c45b5515 This can be const. 2019-10-20 17:22:56 -04:00
Thomas Harte
735586f5f8 Corrects tabs; adds potential output_border optimisation. 2019-10-19 21:20:34 -04:00
Thomas Harte
3c146a3fb2 Adds missing Master System enumerations. 2019-09-30 21:10:30 -04:00
Thomas Harte
4ac3839185 Seeks to ensure that card transitions between real-time and just-in-time don't break timing. 2019-09-28 18:34:04 -04:00
Thomas Harte
fbf95ec2b8 Removes the now empty local namespace. 2019-09-24 22:48:47 -04:00
Thomas Harte
077c7d767f Shifts essential modifiers up to the Keyboard class. 
I had forgotten that mappers are not exposed.
 2019-09-22 13:48:50 -04:00
Thomas Harte
a416bc0058 Adds an interface allowing keyboard mappers to declare modifiers that are 'essential'. 
i.e. ones that, if not delivered reliably, will cause the related machine to behave unexpectedly.
 2019-09-22 13:14:09 -04:00
Thomas Harte
5f16fa8c08 Removes dead reference to video from VIAPortHandler. 2019-09-21 17:39:45 -04:00
Thomas Harte
e7bf0799b6 Implements every-other-cycle-during-pixels RAM timing. 2019-09-21 17:25:20 -04:00
Thomas Harte
2e24da4614 Implements quick booting, and edges towards exposing it on the Mac. 
It should already work in kiosk mode.
 2019-09-19 22:32:12 -04:00
Thomas Harte
e46601872b Establishes that the Macintosh offers the quick-boot option. 2019-09-19 21:50:39 -04:00
Thomas Harte
776b819a5a Adds the SCSI bus as an Activity::Source. 2019-09-19 19:31:22 -04:00
Thomas Harte
962275c22a Removes clock for NCR 5380. 
It doesn't have one in real life, and now can live off the time counting that occurs on the SCSI bus.
 2019-09-18 20:17:47 -04:00
Thomas Harte
243e40cd79 Adds signalling of DACK. 2019-09-14 13:48:33 -04:00
Thomas Harte
1c7e0f3c9d Fixes control line modification by the 5380 and SCSI target command chaining. 
So now I'm back to trying to guess how a SCSI command terminates re: the relative meanings of a message phase and a status phase.
 2019-09-02 23:14:37 -04:00
Thomas Harte
318cdb41ea Adds SCSI bus clocking to the Macintosh, and fixes its internal counting. 2019-09-02 16:03:33 -04:00
Thomas Harte
2f8e31bc8b Takes a first bash at implementing the new SCSI::Bus timing infrastructure. 2019-09-02 13:00:01 -04:00
Thomas Harte
1a60ced61b Starts trying to deal with creating a whole volume from merely a partition. 2019-08-25 23:03:54 -04:00
Thomas Harte
ca08716c52 Introduces real hard disk images to the nascent world of SCSI. 2019-08-25 17:03:41 -04:00
Thomas Harte
90cf99b626 Takes a wild swings at speeding up startup. 
With no success.
 2019-08-18 22:40:16 -04:00
Thomas Harte
f668e4a54c Makes an attempt at getting the 5380 past arbitration. 
Not entirely successful. Also gets a bit smarter with `final` on ClockingHint::Sources.
 2019-08-15 23:14:40 -04:00
Thomas Harte
0f67e490e8 Adjusts NCR address decoding to produce a more plausible initial interaction. 2019-08-11 22:43:25 -04:00
Thomas Harte
895c315fa5 Increases the Mac Plus too 4mb. 2019-08-11 21:41:12 -04:00
Thomas Harte
a90a74a512 Stubs in just enough of the 5380 to get a Mac Plus too boot. 2019-08-11 20:55:20 -04:00
Thomas Harte
bbd4e4d3dc Enhances memory map fidelity to allow for ROM holes on the Mac Plus. 
This is how the ROM detects the difference between the Plus and the 512ke, it seems.
 2019-08-10 23:53:34 -04:00
Thomas Harte
bac0461f7f Switches the drive-speed accumulator to the delegate pattern. 
This allows the Macintosh to ensure that the IWM is kept up just-in-time with drive speed changes.
 2019-08-07 21:39:23 -04:00
Thomas Harte
f26a200d78 Switches to a JustInTimeActor to wrap the IWM. 
Also simplifies potential future usage of the IWM template.
 2019-08-07 21:28:02 -04:00
Thomas Harte
0e293e4983 Relocates RAM delay test in order to scrape out a minor performance win. 2019-08-03 21:46:45 -04:00
Thomas Harte
478f2533b5 Corrects 68000 address bus during interrupt acknowledge. 
All unused bits should be 1, not 0.
 2019-08-03 15:38:36 -04:00
Thomas Harte
a07488cf1b Introduces the Mac Plus memory map. 
Albeit with no SCSI support yet.
 2019-08-02 22:26:40 -04:00
Thomas Harte
d67c5145c0 Introduces RAM access delays. 2019-08-02 22:12:34 -04:00
Thomas Harte
5e76d593af Switches to table-based address decoding. 2019-08-02 21:30:04 -04:00
Thomas Harte
b93f9b3973 Distinguishes time advancement from bus response. 2019-08-02 19:48:41 -04:00