1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-23 03:32:32 +00:00
Commit Graph

315 Commits

Author SHA1 Message Date
Thomas Harte
5aef81cf24 Commutes cross-platform #pragma marks to //MARK:s. 2017-11-12 15:59:11 -05:00
Thomas Harte
2e15fab651 Doubles down on <cX> over <X.h> for C includes, and usage of the namespace for those types and functions. 2017-11-11 15:28:40 -05:00
Thomas Harte
cb0f58ab7a Corrects order-of-initialisation errors in the CPC (again), TextureBuilder, TextureTarget, Z80, MFM parser and binary tape player. 2017-11-10 22:57:03 -05:00
Thomas Harte
4cbc87a17d Corrects out-of-order initialisations for the 1770, Atari 2600 joystick, Pitfall II bus extender, Microdisc and 6502. 2017-11-10 22:20:44 -05:00
Thomas Harte
c0055a5a5f Further builds up SConstruct, correcting many missed imports and a couple of improper uses of C99 in C++ code. 2017-11-09 22:04:49 -05:00
Thomas Harte
6e1d69581c Eliminates a variety of end-of-line spaces. 2017-11-07 22:54:22 -05:00
Thomas Harte
ad9df4bb90 Commutes uint8_t *, uint16_t *, uint32_t *, size_t, off_t and long to functional-style casts. 2017-10-21 22:30:15 -04:00
Thomas Harte
e983854e71 Converts all uint8_t and uint16_t casts to the functional style. 2017-10-21 21:50:53 -04:00
Thomas Harte
ab2bcb939f Separates 6502Base into its constituent parts. 2017-09-04 11:08:33 -04:00
Thomas Harte
45499050b6 Separates Z80Base.cpp into its component classes. 2017-09-04 11:04:01 -04:00
Thomas Harte
a1e200cc65 Further strips back the amount exposed in Z80-related headers.
Almost all opcode table generation macros and code now resides neatly in the world of .CPP.
2017-09-01 22:19:16 -04:00
Thomas Harte
e6ac939ae0 Reintroduces missing noexcept specifier. 2017-09-01 20:51:31 -04:00
Thomas Harte
b034d4e6f8 Refactors the Z80 to separate out interface and implementation.
Following the pattern just established by the 6502, puts all implementation specifics beyond the visibility of a human reading Z80.hpp and in subfolders so as to promote the idea that they shouldn't go out of their way.
2017-09-01 20:50:24 -04:00
Thomas Harte
de218611e4 Corrects possible confusion as documentation recommends Cycles(0) as default, but then gives Cycles(1). 2017-09-01 20:49:24 -04:00
Thomas Harte
b306776ba9 Removes from 6502.hpp all remaining implementation details, making it purely an interface document.
Though those details remain visible to files including 6502.hpp through necessity.
2017-09-01 19:46:29 -04:00
Thomas Harte
4af333d5ec Tidies the 6502 template and folder hierarchy.
Specifically: there's now just the one .h file at the top level, giving a clear indication of what a user should read. That separates implementation from interface. It also devolves a lot more to the base class because doing so makes debug builds less of a hassle. The all-RAM 6502 has been shuffled off into a subfolder, to indicate that it's not something you necessarily need know about. Also general documentation improvements have been applied: incorrect citing of the recurring-template pattern has been removed and the meaning of the two BusHandler methods has now accrued at the bus handler.
2017-08-31 22:10:27 -04:00
Thomas Harte
fab6908129 Corrects the all-RAM Z80 to declare that it needs the wait line to be implemented. 2017-08-26 23:18:11 -04:00
Thomas Harte
57bfec285f Makes it optional whether the Z80 supports the wait line. If the wait line isn't in use, runtime costs are decreased because the optional wait cycles need not be iterated over. 2017-08-26 23:08:57 -04:00
Thomas Harte
fa19e2d9c2 Removes some detritus. 2017-08-24 22:00:21 -04:00
Thomas Harte
95d360251d Makes all of PartialMachineCycle const, with the exception of the target of *value, since that's intended to be writeable by recipients. 2017-08-24 21:32:33 -04:00
Thomas Harte
7af3de010e Suspected my mode 1 interrupt timing might be off. Reminded myself of the sources. Persuaded myself that it wasn't. Added appropriate comments. 2017-08-23 22:25:31 -04:00
Thomas Harte
ee71be0e7e Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable. 2017-08-21 21:56:42 -04:00
Thomas Harte
e1aded0d95 Allows Z80 users to opt out of support for the bus request line. Which both now do. 2017-08-21 20:43:12 -04:00
Thomas Harte
6315c22b80 Removed repeated checking of bus_request_line_. It's now checked only after each outward perform_machine_cycle. 2017-08-20 12:39:45 -04:00
Thomas Harte
42b5b66305 Remove the 6502's use of runtime polymorphism in favour of ordinary templating. 2017-08-16 11:56:52 -04:00
Thomas Harte
039811ce6a Switched the Z80 to being something a machine has, not something a machine is. 2017-08-02 22:09:59 -04:00
Thomas Harte
4abd62e62b Standardises on const [Half]Cycles as the thing called and returned, rather than const [Half]Cycles & as it's explicitly defined to be only one int in size, so using a reference is overly weighty. 2017-07-27 22:05:29 -04:00
Thomas Harte
9ef232157b Revoked the operator bool() on WrappedInt as providing an indirect means for implicit but incorrect assignment to unwrapped ints. Got explicit about run_for intention and simplified HalfClockReceiver slightly by building a lossy and a flushing conversion to Cycles into HalfCycles. Adapted the all-RAM Z80 properly to return HalfCycles. 2017-07-27 21:38:50 -04:00
Thomas Harte
8848ebbd4f Formalised set_interrupt_line's optional parameter as being a count of HalfCycles; corrected PartialMachineCycle.is_wait and effected the proper timing for counter reset on a ZX81. 2017-07-27 21:10:14 -04:00
Thomas Harte
37950143fc Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests. 2017-07-27 20:17:13 -04:00
Thomas Harte
60e374dca3 Merge branch 'master' into Memptr 2017-07-27 07:54:25 -04:00
Thomas Harte
8361756dc4 Switched definitively to the works-for-now approach of requiring an explicit opt-in where somebody wants to clock a whole-cycle receiver from a half-cycle clock. 2017-07-27 07:40:02 -04:00
Thomas Harte
847e49ccdf Corrected timestamp reporting by the all-RAM Z80. 2017-07-26 19:47:39 -04:00
Thomas Harte
81a3899381 Adjusted the Z80 formally to communicate in terms of half cycles rather than whole. 2017-07-26 19:42:00 -04:00
Thomas Harte
9257a3f6d7 Added test for 16-bit arithmetic, and fixed implementation. 2017-07-26 19:04:52 -04:00
Thomas Harte
6ec4e4e3d7 Merge branch 'master' into Memptr 2017-07-25 23:01:34 -04:00
Thomas Harte
966b5e6372 Adapted the Z80's perform_machine_cycle to return Cycles. 2017-07-25 22:25:44 -04:00
Thomas Harte
279c369a1f Switched to Cycles as the result from the 6502 perform_bus_operation, helping slightly to clarify what you're intended to return and reducing type jumping within the 6502 implementation. 2017-07-25 22:21:09 -04:00
Thomas Harte
75d67ee770 Relocated ClockReceiver.hpp as it's a dependency for parts of the static analyser, and therefore needs to be distinct from the actual emulation parts. 2017-07-25 20:20:55 -04:00
Thomas Harte
a1e9a54765 Eliminated redundant uses of ClockReceiver and sought to ensure that proper run_fors are inherited all the way down. 2017-07-25 20:09:13 -04:00
Thomas Harte
677ed463f0 Updated comment per new method name. 2017-07-24 21:19:49 -04:00
Thomas Harte
9bff787ee1 Corrected for the new, non-integral type. 2017-07-24 21:05:07 -04:00
Thomas Harte
b82bef95f3 Decided to follow through on Cycles and HalfCycles as complete integer-alikes. Which means giving them the interesting range of operators. Also killed the implicit conversion to int as likely to lead to type confusion. 2017-07-24 20:10:05 -04:00
Thomas Harte
ace8e30818 Bubbled the Z80's move into clock receiver territory up into the Z80 test machine. 2017-07-23 22:21:39 -04:00
Thomas Harte
ec3aa06caf Removed dangling reference. 2017-07-23 22:16:00 -04:00
Thomas Harte
ba088e5545 Adapted the Z80 into a clock receiver, which also vends Cycles rather than a raw int within its PartialMachineCycle struct. The objective is to update it to vend HalfCycles within its struct, but I think I need to do some work on cycle/half-cycle arithmetic first. 2017-07-23 22:15:04 -04:00
Thomas Harte
2ff157cf7a Switched CRTMachine over to use Cycles as an explicit statement of units, and followed through on the effects of that. 2017-07-22 22:17:29 -04:00
Thomas Harte
83628b285b Experimentally turned the 6502 into a clock receiver. No problem encountered. 2017-07-22 21:52:21 -04:00
Thomas Harte
20a6bcc676 Added tests for the various LD (nn), rr instructions and corrected implementation to pass. 2017-07-22 11:39:13 -04:00
Thomas Harte
eaf313b0f6 Added a test on LD A, (DE) and LD A, (BC), and adjusted implementation to pass. 2017-07-22 11:20:21 -04:00