Thomas Harte
a49594c6a3
Tweaks Vic20 Machine parent class order so that when turned into a CRTMachine, still successfully dynamically casts as a ConfigurationTarget.
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More thorough thought is required.
2017-09-04 20:56:00 -04:00
Thomas Harte
a42ca290cb
Reformulates the Oric more cleanly into the modern world.
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Specifically: now that the implementation is contained within the CPP file, there's no need to embed the keyboard, tape player and VIA port handler as private classes. Also the pain of additional syntax is reduced, so the keyboard has been bumped up to a fully data-hiding class. I've also transferred overall ownership of the tape player, AY and keyboard up to the Oric itself, with the VIA merely being wired to them, and added a whole bunch of extra documentation.
2017-09-04 18:22:14 -04:00
Thomas Harte
da09098e49
Updates clipped area per latest CRT response to vertical sync.
2017-09-04 17:51:02 -04:00
Thomas Harte
24b3faa427
Deconstitutes the 6522 into component parts, templated and non-templated.
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Adjusts the Oric, Vic-20 and C-1540 accordingly, albeit with the quickest possible solutions.
2017-09-04 14:26:04 -04:00
Thomas Harte
96648df5fe
Ensures all parts of the Electron have a fully-defined initial state.
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Specifically to resolve an error with shift being pressed at startup due to a failure to establish a default value for that flag, but applying the same principle across the board.
2017-08-31 22:29:24 -04:00
Thomas Harte
53a88a7e12
Causes the ZX80/81 to omit support for the wait line if being configured as a ZX80.
2017-08-27 16:45:36 -04:00
Thomas Harte
4a66dd9e82
Arranges for the ZX80/81 to get a peek at target configuration prior to construction. I'm as yet undecided on whether to make this the norm.
2017-08-27 16:42:16 -04:00
Thomas Harte
57bfec285f
Makes it optional whether the Z80 supports the wait line. If the wait line isn't in use, runtime costs are decreased because the optional wait cycles need not be iterated over.
2017-08-26 23:08:57 -04:00
Thomas Harte
e7ad79c79a
Breaks apart the CPC's 6845 bus handler to obey phase 1 and phase 2, and now back-dates interrupts when appropriate.
2017-08-26 14:07:51 -04:00
Thomas Harte
6e99169348
Permits the 6845's bus state to be examined by an owner, eliminating the need to buffer it in the bus handler. But more than that it allows the CRTC to decide when it adjusts the various outputs respective to the main phase. So a net effect of the change is that the CPC now sees vsync a cycle earlier, because my current reading of the 6845 datasheet is that it is set at the end of phase 1, not the beginning of the next phase 1.
2017-08-26 12:59:59 -04:00
Thomas Harte
ee71be0e7e
Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable.
2017-08-21 21:56:42 -04:00
Thomas Harte
cde29c4bf4
Added forceinlines and properly declared finals and overrides.
2017-08-21 21:07:10 -04:00
Thomas Harte
e1aded0d95
Allows Z80 users to opt out of support for the bus request line. Which both now do.
2017-08-21 20:43:12 -04:00
Thomas Harte
0cbc1753b9
Quick fixes: the binary tape player now considers talk to the sleep observer only if motor control changes. The Amstrad CPC no longer attempts to use the component argument to identify the caller, since this will often be that of the superclass and not that of the derived class known to the CPC.
2017-08-20 13:18:46 -04:00
Thomas Harte
8f5ae4a326
The CPC now responds to tape-originating sleeper observations.
2017-08-20 12:21:02 -04:00
Thomas Harte
e88a51e75e
Worked logic all the way down to the CPC. If the 8272 announces that it is asleep, it is now no longer clocked. Also very slightly cut down on IRQ line chatter to the Z80.
2017-08-20 12:05:00 -04:00
Thomas Harte
f2699a3f2b
Okay, even if releasing it is unsafe, I can at least move the typer so that it is no longer called.
2017-08-20 10:24:01 -04:00
Thomas Harte
85253a5876
Sought further to reduce the processing footprint of palette changes by updating only those table entries that are affected by a change.
2017-08-20 10:13:23 -04:00
Thomas Harte
911ee5a0d3
At least added a fast return.
2017-08-19 22:22:51 -04:00
Thomas Harte
57c5b38a6d
Step one towards cutting much of this cost: build only the table that's appropriate for the current mode, and at least declare when a more minimal change would be sufficient.
2017-08-19 22:19:46 -04:00
Thomas Harte
f68565a33f
Split the static analyser functionality so that it's possible just to ask for the set of media implied by a particular file. Extended ConfigurationTarget so that media alone can be pushed to a machine.
2017-08-17 10:48:29 -04:00
Thomas Harte
b476f06524
Slowed the typer, having discovered that otherwise it has problems transitioning from a shifted to an unshifted character.
2017-08-16 22:12:16 -04:00
Thomas Harte
925e774015
Added a decent portion of documentation. But started feeling like I should address my various ownership decisions. Which would justify a separate pull request.
2017-08-16 16:23:33 -04:00
Thomas Harte
4c15e46fd1
Performed the normative removal from public view of Vic-20 implementation details. Which were hefty.
2017-08-16 16:05:30 -04:00
Thomas Harte
75208b0762
Moves the Electron implementation behind a more opaque interface, in line with changes elsewhere.
2017-08-16 15:33:40 -04:00
Thomas Harte
903a17ae11
Corrected typo and removed replication of what's already declared formally.
2017-08-16 14:53:03 -04:00
Thomas Harte
de1c526789
Cut the amount disclosed by the Atari 2600 for public inspection down to the minimum, relocating implementation into the .cpp.
2017-08-16 14:52:40 -04:00
Thomas Harte
148591b7f2
Hid most of the Oric innards, and corrected a potential multi-thread access error emanating from the Mac side of the world.
2017-08-16 14:35:53 -04:00
Thomas Harte
3c148f5721
Fixed clanger of an error.
2017-08-16 14:02:46 -04:00
Thomas Harte
360c8a99a3
Adjusted Atari2600 actually to use the nominated type of bus extender.
2017-08-16 12:57:32 -04:00
Thomas Harte
06e31f5102
Consequential to the 6502 change, severs the Atari 2600's cartridge container from its former attempt at runtime polymorphism, in favour of each cartridge's specific hardware being defined as a 'bus extender'.
2017-08-16 12:39:15 -04:00
Thomas Harte
42b5b66305
Remove the 6502's use of runtime polymorphism in favour of ordinary templating.
2017-08-16 11:56:52 -04:00
Thomas Harte
3947347d88
Introduces active input handling for the AY and uses it in the CPC to give proper, active keyboard input, rather than push-on-select, which was only ever a temporary hack. Also maps a few more keys for the Amstrad.
2017-08-15 22:47:17 -04:00
Thomas Harte
334872d374
Clarified, slightly.
2017-08-14 12:47:11 -04:00
Thomas Harte
7ea703f150
Started making provisions for a DMA-compatible implementation. Re: the CPC, it sounds like DMA acknowledge might be permanently wired, causing DMA mode seemingly to work from the 8272's point of view.
2017-08-14 08:38:00 -04:00
Thomas Harte
3831fbaca2
Ensured the ZX80 and '81 also provide the necessary hook for destruction.
2017-08-11 12:11:01 -04:00
Thomas Harte
1d8edf58dd
Ensured that a virtual destructor is declared, so that the various automatically-generated real constructors get in on the action.
2017-08-11 12:07:48 -04:00
Thomas Harte
4785e316ff
Now with exposition.
2017-08-11 11:36:03 -04:00
Thomas Harte
44da9de5b0
Tweaked typing timing expectations.
2017-08-11 11:35:28 -04:00
Thomas Harte
4ecd093891
Fixed test for termination of a key sequence; the previous error will have seen this reduce all multi-key sequences to just the one, and expand single-key sequences to "probably" two, posting an out-of-bounds code to the machine at completion.
2017-08-11 11:35:14 -04:00
Thomas Harte
dd4bc87d52
Fixed: should be a full-path #ifdef guard, given that this is one of the classes named relative to its namespace.
2017-08-11 11:21:33 -04:00
Thomas Harte
570d25214e
Made an initial attempt at typer support for the CPC.
2017-08-11 11:21:07 -04:00
Thomas Harte
cf810d8357
Minor: ensure the CRT is set to output as a monitor.
2017-08-10 14:42:47 -04:00
Thomas Harte
4961fda2a9
Ensured counter-intuitive CRTC writes get through, taking the opportunity to correct my handling of port IO in general: selecting multiple devices for input results in a logical AND (i.e. open collector mode), and both the CRTC and gate array will receive data from 'input's if applicable.
2017-08-10 12:39:19 -04:00
Thomas Harte
6a6e5ae79c
Forced users of the 6845 to be explicit about which type. So far with no effect.
2017-08-10 12:28:57 -04:00
Thomas Harte
484524d781
Implements RAM paging. The 6128 is now emulated.
2017-08-08 16:01:56 -04:00
Thomas Harte
a7103f9333
Disks are now communicated to the 8272. Which is able to handle four of them.
2017-08-06 13:24:14 -04:00
Thomas Harte
29288b690e
Switched disk controllers to be instantiated explicitly in terms of cycles, created an Amstrad-specific subclass of the 8272 to record the direct programmatic availability of all disk motors bundled together, and otherwise adjusted to ensure the thing is clocked and that the motor is enabled and disabled appropriately. The 8272 is also now formally a subclass of the incoming MDM controller.
2017-08-06 09:45:16 -04:00
Thomas Harte
3e984e75b6
Strung up an empty shell that eventually should contain the 8272, and added appropriate IO decoding to the Amstrad.
2017-08-05 19:45:52 -04:00
Thomas Harte
9e8645ca7a
Fixed ROM paging port decoding. It should have been fd00 if completely decoded, not df00, but also shouldn't be completely decoded.
2017-08-05 19:24:03 -04:00
