Thomas Harte
b22b489380
Mask into 4kb; I don't know whether hardware scrolling is in use.
2023-11-22 14:12:57 -05:00
Thomas Harte
231de8440e
Add text display.
2023-11-22 14:11:22 -05:00
Thomas Harte
381537fde9
Get as far as MDA being able to fetch.
2023-11-22 13:52:28 -05:00
Thomas Harte
f249e4ada6
Maintain an actual pixel buffer.
2023-11-22 13:40:50 -05:00
Thomas Harte
12179e486f
Create a solid white rectangle.
2023-11-22 13:18:39 -05:00
Thomas Harte
80b2ccd418
Attempt to wire in a CRTC.
2023-11-22 12:53:09 -05:00
Thomas Harte
1828a10885
Use less branchy inner loop.
2023-11-21 22:42:53 -05:00
Thomas Harte
bcd4a2216a
Improve clocking.
2023-11-21 22:36:11 -05:00
Thomas Harte
3da3401125
Attempt full audio output.
2023-11-21 22:28:33 -05:00
Thomas Harte
972d1d1ddd
Add audio pipeline.
2023-11-21 22:11:32 -05:00
Thomas Harte
6329a1208a
Adopt PIT-centric timing.
2023-11-21 22:02:24 -05:00
Thomas Harte
375a9f9ff5
Pull out the PIC, DMA.
2023-11-21 15:50:38 -05:00
Thomas Harte
a1e118a1ff
Do some interrupt work.
2023-11-21 15:46:31 -05:00
Thomas Harte
83ca9b3af5
Hack in some MDA text logging. Boot seems to complete?
2023-11-21 11:37:36 -05:00
Thomas Harte
acdf32e820
Handle low/high switches.
2023-11-21 11:25:53 -05:00
Thomas Harte
931e6e7a56
Add, disable, logging detritus.
2023-11-21 11:19:47 -05:00
Thomas Harte
058080f6de
Prove to my caveman self that no text is being written.
2023-11-20 23:11:27 -05:00
Thomas Harte
c4e9f75709
Edge towards but don't quite reach interrupt.
2023-11-20 22:52:20 -05:00
Thomas Harte
695282b838
PIT output now reaches the PIC.
2023-11-20 22:36:05 -05:00
Thomas Harte
f0e2ef5e28
Attempt to implement square-wave mode.
2023-11-20 22:19:18 -05:00
Thomas Harte
ee6012f6e9
Evict the PIT.
2023-11-20 19:00:16 -05:00
Thomas Harte
d3e90ce006
Capture some basics.
...
BIOS now seems to get as far as expecting channel 0 to trigger an interrupt, which never comes.
2023-11-20 15:36:52 -05:00
Thomas Harte
18ddc2c83a
Route traffic.
2023-11-20 15:11:22 -05:00
Thomas Harte
abf0eead7a
Add a functionless PIC.
2023-11-20 13:53:44 -05:00
Thomas Harte
a689f2b63e
Relocate comment.
2023-11-20 12:22:30 -05:00
Thomas Harte
a3066fc040
Advance to the missing PIC.
2023-11-20 12:21:37 -05:00
Thomas Harte
7eed254de9
Bring an 8255 into the mix.
2023-11-20 12:13:42 -05:00
Thomas Harte
55f466f2fa
Add enough of the DMA subsystem to trip over in PPI world.
2023-11-19 22:55:29 -05:00
Thomas Harte
119c83eb18
Fix field decoding.
2023-11-19 21:51:27 -05:00
Thomas Harte
4e077701c9
Exit without further modification upon latch.
2023-11-19 16:37:47 -05:00
Thomas Harte
a8f1c72f5c
Take a caveman run at debugging.
2023-11-19 16:05:44 -05:00
Thomas Harte
05e93f0eb3
Implementing counting for a couple of PIT modes.
2023-11-19 15:52:32 -05:00
Thomas Harte
af885ccf08
Decode PIT mode writes.
2023-11-19 15:01:21 -05:00
Thomas Harte
2b69081fff
Start sketching the PIT.
2023-11-19 07:15:30 -05:00
Thomas Harte
a91449555f
Add link for future self.
2023-11-17 17:38:17 -05:00
Thomas Harte
afc0ca3f1b
Add XT roadmap.
2023-11-17 17:35:11 -05:00
Thomas Harte
f0ac62566c
Add an 80286 BIOS, for later.
2023-11-17 17:15:57 -05:00
Thomas Harte
d202cfc2ca
Add TODO.
2023-11-17 17:09:20 -05:00
Thomas Harte
ec2d878e3f
End run around the template.
...
I have yet to get any insight whatsoever on the reason for GCC's failure here and won't have access to a suitable test
machine for a while so all I have for testing is the arduous CI cycle.
2023-11-17 17:02:46 -05:00
Thomas Harte
8af173c4bc
Remove hopeful hit.
2023-11-16 15:48:27 -05:00
Thomas Harte
e1541543c3
Play hit and hope.
2023-11-16 15:40:47 -05:00
Thomas Harte
99e7de5a8b
Colocate memory.
2023-11-16 15:24:35 -05:00
Thomas Harte
095359017f
Log first unhandled port.
2023-11-16 13:02:35 -05:00
Thomas Harte
25f0a373f3
Don't sign-extend ports (!).
2023-11-16 11:17:12 -05:00
Thomas Harte
832e31f7e5
Add note to self.
2023-11-16 10:34:24 -05:00
Thomas Harte
164a7fe848
Log port IO.
2023-11-16 06:48:24 -05:00
Thomas Harte
62b6219763
Install BIOS, albeit in writeable storage.
2023-11-15 22:02:53 -05:00
Thomas Harte
2bc9dfbef9
Albeit with no BIOS present, execute.
2023-11-15 16:10:37 -05:00
Thomas Harte
3b84299a05
Edge closer to PCCompatible doing _something_.
2023-11-15 15:58:49 -05:00
Thomas Harte
6f48ffba16
Add enough of a ScanProducer to run.
2023-11-15 14:30:30 -05:00
Thomas Harte
1a3b2b0620
Add necessary wiring for File -> New...
2023-11-15 14:27:04 -05:00
Thomas Harte
af7069ac21
Include and fetch a BIOS.
2023-11-15 11:32:23 -05:00
Thomas Harte
e927fd00d8
Do just enough to include x86 code in the main build.
2023-11-15 11:01:28 -05:00
Ryan Carsten Schmidt
234292f163
Fix Apple II/II+/IIe first eight non-hbl vbl bytes
...
Closes #1196
2023-11-13 00:51:34 -06:00
Ryan Schmidt
18ed36d090
Update get_last_read_value source documentation
2023-10-25 03:25:52 -05:00
Ryan Schmidt
c206c7e2cb
Fix Apple II/II+ text/lores hbl read addresses
...
Closes #1181
2023-10-25 03:25:48 -05:00
Ryan Schmidt
98730f1f90
Fix Apple II/II+/IIe first hbl byte read addresses
...
Closes #1180
2023-10-25 03:21:22 -05:00
Ryan Schmidt
c272632b5a
Fix Apple II/II+/IIe hbl row < 64 read addresses
...
See #1180
2023-10-25 03:21:17 -05:00
Ryan Schmidt
577b01e80b
Fix Apple II/II+/IIe vbl rows read addresses
...
See #1180
2023-10-25 03:21:06 -05:00
Thomas Harte
8efb6a9226
Simplify 'get_next_sequence_point' -> 'next_sequence_point'.
2023-09-10 18:00:49 -04:00
Thomas Harte
e5d3140cd1
Avoid flurry of startup events, repeats.
2023-08-22 09:28:57 -04:00
Thomas Harte
79e9de34b6
Flip order of byte usage in double high res mono.
2023-08-21 22:20:42 -04:00
Thomas Harte
2b58f64161
Switch to maximal signalling rate.
2023-08-21 22:12:55 -04:00
Thomas Harte
bb84a5a474
Enable various ADB-controller interrupts.
2023-08-21 15:35:13 -04:00
Thomas Harte
357a324e87
Add exposition.
2023-08-20 15:34:40 -04:00
Thomas Harte
b8e7c2b8ac
Remove printf.
2023-08-20 15:33:30 -04:00
Thomas Harte
3e2a82b638
Add delta capper.
2023-08-20 15:32:48 -04:00
Thomas Harte
1125286b96
Add note to self.
2023-08-20 15:03:28 -04:00
Thomas Harte
17f1f05064
Hit and hope appears to have fixed mouse input.
2023-08-20 15:02:25 -04:00
Thomas Harte
b34403164e
Abstract out VGC interrupt register; fix clearing bug.
2023-08-18 14:30:40 -04:00
Adrian Perez de Castro
1de2631877
Add missing <cstdint> includes for GCC 13
...
Sprinkle includes of the <cstdint> header as needed to make the
build succeed with GCC 13, this fixes both with SDL and Qt builds.
2023-05-25 23:06:13 +03:00
Thomas Harte
8578dfbf22
Eliminate various other errant spaces.
2023-05-16 16:40:09 -04:00
Thomas Harte
7f8f1d7e61
Avoid BASIC 2.1 requirement when running 1.1.
2023-05-15 10:17:27 -04:00
Thomas Harte
a1a7c0e253
Apply maybe_unused judiciously.
2023-05-15 10:17:04 -04:00
Thomas Harte
22ac13d3f2
Set proper number of volumes.
2023-05-13 22:29:09 -04:00
Thomas Harte
876fc6d1e0
Eliminate redundant line break.
2023-05-13 22:18:40 -04:00
Thomas Harte
e1d671daf7
Avoid paying for an OPLL if not connected.
2023-05-13 22:16:42 -04:00
Thomas Harte
4989701de9
Install MSX-MUSIC ROM.
2023-05-12 23:50:43 -04:00
Thomas Harte
fed97b8d26
Add MSX-MUSIC entry.
2023-05-12 23:33:28 -04:00
Thomas Harte
e7888497b7
Add an OPLL.
2023-05-12 23:30:03 -04:00
Thomas Harte
0b53c73da8
Add additional consts.
2023-05-12 22:13:55 -04:00
Thomas Harte
a6ebfe2ce2
Add has_msx_music flag.
2023-05-12 22:09:15 -04:00
Thomas Harte
50343dec43
Eliminate all whitespace-only lines.
2023-05-12 14:16:39 -04:00
Thomas Harte
28c79b2885
Eliminate redundant [space][tab] pairs.
2023-05-12 14:14:45 -04:00
Thomas Harte
f6acee18cc
Eliminate type-in-function-name from 6502-world.
2023-05-10 18:53:38 -05:00
Thomas Harte
10cd2a36cf
Avoid type-in-function-name, Z80 edition.
2023-05-10 18:42:19 -05:00
Thomas Harte
809cd7bca9
Remove the 68000's Mk2 suffix.
2023-05-10 17:13:01 -05:00
Thomas Harte
e56db3c4e5
Eliminate the old 68000 implementation.
2023-05-10 17:06:27 -05:00
Thomas Harte
2b56b7be0d
Simplify namespace syntax.
2023-05-10 16:02:18 -05:00
Thomas Harte
0cb4fec504
Merge pull request #1129 from TomHarte/FarewellCodecvt
...
Eliminate use of deprecated codecvt.
2023-04-30 17:21:43 -04:00
Thomas Harte
ec81cdd388
Eliminate codecvt.
2023-04-30 17:17:40 -04:00
Thomas Harte
1f4d526ea5
Permit MSX RAM mapper readback.
2023-04-29 23:48:22 -04:00
Thomas Harte
201a7c17ae
Avoid VDP race condition.
2023-03-12 23:20:48 -04:00
Thomas Harte
9836a108da
Avoid VDP access races.
2023-03-10 21:04:55 -05:00
Thomas Harte
1edf747f9f
Avoid flushes for video output changes.
2023-02-14 20:13:34 -05:00
Thomas Harte
4c93d01fe2
Reduce logging.
2023-01-29 21:30:57 -05:00
Thomas Harte
c9643c4145
Log memory control meaningfully.
2023-01-21 14:13:02 -05:00
Thomas Harte
339086d597
The Yamaha chips have more ports.
2023-01-17 22:29:17 -05:00
Thomas Harte
055e9cdf8d
Differentiate unmapped and mapped-for-handler.
2023-01-16 19:52:40 -05:00
Thomas Harte
a5b9bdc18c
Eliminate speculative apply_mapping
.
2023-01-16 11:53:04 -05:00
Thomas Harte
eb51ff5cdf
Add RAM paging.
2023-01-16 11:52:08 -05:00
Thomas Harte
1769c24531
Avoid ambiguous naming.
2023-01-16 11:43:43 -05:00
Thomas Harte
1a58ddaa67
Increase notes for future self.
2023-01-15 23:12:36 -05:00
Thomas Harte
183cb519e7
Give autonomy to secondary slots.
2023-01-15 22:51:17 -05:00
Thomas Harte
68361913ee
Substitute VDP for the MSX 2.
2023-01-14 22:05:59 -05:00
Thomas Harte
1e17fc71ab
Add an RP-5C01 to the MSX 2.
2023-01-14 14:52:07 -05:00
Thomas Harte
18def0c97d
Correct extension ROM visibility.
2023-01-13 22:22:58 -05:00
Thomas Harte
f0a4d1d8ec
Wire up did-page notifications.
2023-01-13 21:54:59 -05:00
Thomas Harte
50b5122969
For an MSX 2, the extension ROM is obligatory.
2023-01-13 14:18:39 -05:00
Thomas Harte
9f450b3ccb
Expose the extension ROM to an MSX 2.
2023-01-13 14:16:12 -05:00
Thomas Harte
4190d25698
Ensure RAM is properly sized and available.
2023-01-13 14:07:54 -05:00
Thomas Harte
befc81743a
Fix base RAM mapping.
2023-01-13 09:31:56 -05:00
Thomas Harte
23ff3fc366
Ensure all routes go somewhere.
2023-01-13 08:05:12 -05:00
Thomas Harte
78ce439b9b
Add missing header; correct type.
2023-01-12 23:08:01 -05:00
Thomas Harte
ce440d52b3
Standardise name.
2023-01-12 23:02:24 -05:00
Thomas Harte
2e7e5ea12b
Fleshes out most of a cleaner memory slot layout.
2023-01-12 23:01:11 -05:00
Thomas Harte
0d8c014099
Secondary slot selections are per primary slot.
2023-01-11 13:15:00 -05:00
Thomas Harte
fee82d3baa
Fix typo.
2023-01-11 13:14:42 -05:00
Thomas Harte
76ad465030
Also seek the extension ROM for the MSX 2.
2023-01-11 12:56:09 -05:00
Thomas Harte
483ee8a74f
Add a catch for the secondary paging register.
2023-01-10 22:24:40 -05:00
Thomas Harte
520ae7f2b2
Pick generic BIOS based on machine type.
2023-01-10 22:15:01 -05:00
Thomas Harte
ae5b81c0ab
Add MSX 2 to the ROM catalogue.
2023-01-10 18:17:17 -05:00
Thomas Harte
6bd261b222
Add storage for secondary paging.
2023-01-10 18:07:31 -05:00
Thomas Harte
53bb17c848
Use model as a compile-time MSX configurator.
2023-01-10 14:55:57 -05:00
Thomas Harte
73549eb38c
Document quite a bit more, to refresh my memory.
2023-01-10 14:40:03 -05:00
Thomas Harte
ef67205ce8
Set pixel count per mode.
2023-01-08 21:31:00 -05:00
Thomas Harte
794adf470b
Break assumption that cycles = pixels; fix pixel clocking.
2023-01-08 21:25:22 -05:00
Thomas Harte
e8aab1fd2a
Restore proper VDP selection.
2022-12-31 21:54:14 -05:00
Thomas Harte
ffb0b2ce0b
Eliminate runtime duplication of personality.
2022-12-31 21:50:57 -05:00
Thomas Harte
7d6eac2895
Template the TMS on its personality.
...
Template parameter currently unused, but preparatory to other improvements.
2022-12-31 15:08:33 -05:00
Thomas Harte
ee22a98c17
Add note to future self.
2022-12-27 20:23:25 -05:00
Thomas Harte
28b4f51cb3
Add a SCSI activity indicator.
2022-11-16 11:31:10 -05:00
Thomas Harte
2f78a1c7af
Add SCSI controller inclusion logic.
2022-09-15 12:17:50 -04:00
Thomas Harte
dc35ec8fa0
Merge branch 'master' into AppleIISCSI
2022-09-15 12:05:58 -04:00
Thomas Harte
36c3cb1f70
Deal with pre-ROM03 case, now that it's easy.
2022-09-13 16:31:06 -04:00
Thomas Harte
6773a321c1
Switch to portable direct bitwise logic.
2022-09-13 16:02:49 -04:00
Thomas Harte
ffdf44ad4f
Switch to overt use of std::fill.
2022-09-13 15:39:17 -04:00
Thomas Harte
cbfd8e18e8
Eliminate repetitive magic constants.
2022-09-02 15:54:16 -04:00
Thomas Harte
8dc1aca67c
Add TODO shout-outs.
2022-08-31 21:20:08 -04:00
Thomas Harte
df29a50738
Attempt to support the DMA interface.
2022-08-31 15:33:48 -04:00
Thomas Harte
7996fe6dab
'Clock' the SCSI bus (i.e. make it aware of passing time).
2022-08-30 16:40:25 -04:00
Thomas Harte
4df2a29a1f
Add storage to the bus.
2022-08-24 15:23:50 -04:00
Thomas Harte
6010c971a1
Provide a volume to the SCSI card if one is received.
2022-08-23 15:11:56 -04:00
Thomas Harte
ea4bf5f31a
Provide card's SCSI ID.
2022-08-23 15:05:36 -04:00
Thomas Harte
f4c242d5e9
Attempt to offer centralised C8 region decoding.
2022-08-23 14:50:44 -04:00
Thomas Harte
0595773355
Invents a new virtual select line for extended handling card ROM areas.
2022-08-23 14:41:45 -04:00
Thomas Harte
f89ca84902
Add missing include.
2022-08-22 21:44:33 -04:00
Thomas Harte
246bd5a6ac
Merge branch 'master' into AppleIISCSI
2022-08-22 17:09:57 -04:00
Thomas Harte
3c2d01451a
Remove dead comment.
2022-08-22 17:01:52 -04:00
Thomas Harte
c2c81162a1
Sketch out some of the easy stuff.
2022-08-22 16:48:51 -04:00
Thomas Harte
3d234147a6
Add in collected specs.
2022-08-22 10:22:19 -04:00
Thomas Harte
8e7f53751d
Add Apple II SCSI ROM to the catalogue.
2022-08-21 22:03:52 -04:00
Thomas Harte
bfc77f1606
Add workaround that further isolates whatever bug Spindizzy reveals.
2022-08-19 16:38:42 -04:00
Thomas Harte
a6b8285d9c
Factor out the blitter sequencer.
2022-08-19 16:38:15 -04:00
Thomas Harte
837acdcf60
Experimentally decline immediate blits.
2022-08-16 21:51:13 -04:00
Thomas Harte
7289192130
Fix refresh slots: they're taken, not open.
2022-08-16 21:51:02 -04:00
Thomas Harte
bb54ac14b8
Prove that new output errors are [probably] external to the Blitter.
2022-08-15 11:10:17 -04:00
Thomas Harte
856e3d97bf
Merge branch 'master' into SerialisedBlitter
2022-08-15 10:54:36 -04:00
Thomas Harte
94231ca3e3
Put word-sizing responsibility on the caller.
2022-08-10 16:41:45 -04:00
Thomas Harte
e2a8b26b57
Display properly from greater RAM sizes.
2022-08-10 16:36:11 -04:00
Thomas Harte
6d1c954623
Make ST RAM size selectable, default to 1MB.
2022-08-10 12:00:06 -04:00
Thomas Harte
bdb35b6191
Add an easier hook for debugging.
2022-08-08 21:00:28 -04:00
Thomas Harte
892580c183
Clarify test.
2022-08-08 15:57:36 -04:00
Thomas Harte
d4b7d73fc4
Further reduces lines to one access per slot, max.
2022-08-07 19:19:00 -04:00
Thomas Harte
867769f6e7
Reduces line drawing to two accesses per slot.
...
Still a fiction, but a better one.
2022-08-07 19:15:03 -04:00
Thomas Harte
3781b5eb0e
Provide further context.
2022-08-06 14:40:12 -04:00
Thomas Harte
318cea4ccd
Attempt a full bus-transaction comparison.
2022-08-06 10:06:49 -04:00
Thomas Harte
45892f3584
Add optional transaction records to the Blitter.
2022-08-06 09:51:20 -04:00
Thomas Harte
612413cb1c
Remove redundant state.
2022-08-04 10:06:14 -04:00
Thomas Harte
511ec5a736
Apply modulos at end of final line.
...
Possibly I need to rethink the sequence logic?
2022-07-30 21:35:26 -04:00
Thomas Harte
4fb9dec381
Fix use of bool.
2022-07-30 21:02:44 -04:00
Thomas Harte
82476bdabe
Avoid 'complete' repetition.
2022-07-30 21:02:04 -04:00
Thomas Harte
58ee8e2460
Minor tidy-up. No fixes.
2022-07-30 21:00:50 -04:00
Thomas Harte
94a90b7a89
Attempt a real slot-by-slot blit.
2022-07-30 20:34:37 -04:00
Thomas Harte
5d992758f8
Ensure blitter with all flags disabled terminates.
2022-07-30 20:13:37 -04:00
Thomas Harte
27b8c29096
Apply modulos at end of line, not beginning.
2022-07-30 10:27:53 -04:00
Thomas Harte
93d2a612ee
Add an explicit flush-pipeline step; some tests now pass.
2022-07-29 16:33:46 -04:00
Thomas Harte
03d4960a03
Begin a full-synchronous usage of the sequencer, at least exposing poor handling of the pipeline.
2022-07-29 16:15:18 -04:00
Thomas Harte
1ac0a4e924
Provide a loop count directly from the sequencer.
...
This avoids the caller having to take a guess at iterations.
2022-07-29 12:14:59 -04:00
Thomas Harte
d85d70a133
Add documentation, formal begin function.
2022-07-26 22:01:43 -04:00
Thomas Harte
2c95dea4db
Introduce putative blitter sequencer.
2022-07-26 17:05:05 -04:00
Thomas Harte
804c12034c
Apply blitter priority bit.
2022-07-26 16:07:26 -04:00
Thomas Harte
ce7f57f251
Switch to regular integer types for flags.
2022-07-26 09:22:05 -04:00
Thomas Harte
426eb0f79b
Add comments, fix playfield sprite masking.
2022-07-22 17:01:38 -04:00
Thomas Harte
6beca141d5
Reinstate assumption of no sprites in vertical blank.
2022-07-21 08:41:50 -04:00
Thomas Harte
f29d305597
Add missing #include.
2022-07-19 21:40:16 -04:00
Thomas Harte
89abf7faeb
Take a guess at reintroducing a special case for end-of-blank.
2022-07-19 21:25:34 -04:00
Thomas Harte
57186c3c14
Don't limit sprite fetch area; add further commentary.
2022-07-19 16:37:13 -04:00
Thomas Harte
feee6afe0f
Improve documentation.
2022-07-19 16:19:19 -04:00
Thomas Harte
cb42ee3ade
Eliminate DMAState
; it sounds like VSTOP solves this problem.
2022-07-19 16:11:29 -04:00
Thomas Harte
830704b4a9
Clarify and slightly improve state machine.
...
No more using the visible flag to permit a DMA control fetch.
2022-07-19 15:39:57 -04:00
Thomas Harte
8f2e94a1d8
Switch name back to emphasise _async_.
2022-07-16 14:41:04 -04:00
Thomas Harte
76d5e53094
Fix red/blue confusion.
2022-07-15 16:24:07 -04:00
Thomas Harte
f465fe65f4
Merge pull request #1061 from TomHarte/MacintoshPixels
...
Microtweak: simplify Macintosh pixel serialisation.
2022-07-14 18:54:10 -04:00
Thomas Harte
bf03bda314
Generalise AsyncTaskQueue, DeferringAsyncTaskQueue and AsyncUpdater into a single template.
2022-07-14 16:39:26 -04:00
Thomas Harte
59da143e6a
Add overt flushes to the SDL target.
2022-07-12 10:57:22 -04:00
Thomas Harte
4e9ae65459
Reintroduce sync matching.
2022-07-12 09:56:13 -04:00
Thomas Harte
6dabdaca45
Switch to int
; attempt to do a better job of initial audio filling.
2022-07-09 13:33:46 -04:00
Thomas Harte
b097b1296b
Adopt granular flushing widely.
2022-07-08 16:04:32 -04:00
Thomas Harte
b03d91d5dd
Permit granular specification of what to flush.
2022-07-08 15:38:29 -04:00
Thomas Harte
96189bde4b
Loop the Master System into the experiment.
2022-07-07 16:46:08 -04:00
Thomas Harte
fc0dc4e5e2
Amiga only, temporarily: attempt to reduce audio maintenance costs.
2022-07-07 16:41:49 -04:00
Thomas Harte
7cbee172b2
Merge pull request #1041 from TomHarte/InST
...
Switch the Atari ST to the newer 68000.
2022-06-30 17:15:04 -04:00
Thomas Harte
6a2d4ae11d
Merge branch 'master' into InAmiga
2022-06-30 10:12:32 -04:00
Thomas Harte
6da634b79f
Merge branch 'master' into InST
2022-06-30 10:12:23 -04:00
Thomas Harte
924de35cf3
Go all in on support for physical shadowing.
2022-06-29 14:39:56 -04:00
Thomas Harte
7cf9e08948
Map shadowing by logical address, not physical.
...
Disclaimer: although this better matches the tests, I've yet to verify.
2022-06-29 06:10:15 -04:00
Thomas Harte
60d3519993
Clarify, attempt to implement as internally documented.
2022-06-28 22:32:31 -04:00
Thomas Harte
6abc317986
Avoid permitting writes in the Cx00 region after uninhibiting the language card.
2022-06-28 16:35:47 -04:00
Thomas Harte
94fcc90886
Use auxiliary switches to control language card area when card is inhibited.
2022-06-28 12:46:31 -04:00
Thomas Harte
7aeaa4a485
Tweak paging semantics, to allow simple multiple dependencies.
2022-06-27 21:38:45 -04:00
Thomas Harte
ef40a81be2
Remove temporary hack.
2022-06-27 08:00:29 -04:00
Thomas Harte
21842052cf
Alternative zero page should affect bank 0's language card area when the card is disabled.
2022-06-27 07:56:45 -04:00
Thomas Harte
56aa182fb6
Fix debug builds.
2022-06-06 15:26:15 -04:00
Thomas Harte
9818c7e78c
Switch the Amiga to the newer 68000.
2022-06-06 11:10:56 -04:00
Thomas Harte
5495f30329
Microtweak: simplify Macintosh pixel serialisation.
2022-06-06 08:34:58 -04:00
Thomas Harte
6aa599a17c
Future-proof perform_bus_operation
.
2022-06-06 08:20:16 -04:00
Thomas Harte
57858b2fa5
Merge branch 'master' into InST
2022-06-05 20:59:48 -04:00
Thomas Harte
403eda7024
Add missing flush
.
2022-06-05 09:08:36 -04:00
Thomas Harte
1671827d24
Add flush
.
2022-06-05 09:07:43 -04:00
Thomas Harte
4a740fbd14
Switch Atari ST to using the new 68000.
2022-06-04 08:43:43 -04:00
Thomas Harte
a61f7e38b6
Very minor: avoid division and modulus when unnecessary.
2022-06-03 15:39:29 -04:00
Thomas Harte
3d059cb751
Make use of Microcycle helpers where relevant.
...
None of these existed when the Macintosh was first added to this emulator.
2022-06-03 15:33:31 -04:00
Thomas Harte
1365fca161
Avoid phoney write modifies.
2022-05-27 21:42:55 -04:00
Thomas Harte
a611a745e7
Switch the Macintosh to 68000 mk2.
2022-05-24 12:35:36 -04:00
Thomas Harte
b0518040b5
Plants the seek of a 68000 mark 2.
2022-05-16 11:44:16 -04:00
Thomas Harte
866b6c6129
Eliminate off_t
.
2022-04-27 19:16:37 -04:00
Thomas Harte
efff91ea3d
Undo bad guess at initial switch state.
2022-04-17 17:03:05 -04:00
Thomas Harte
290dd3993b
CPC: ensure 64/128k RAM is properly selected.
2022-03-26 08:54:07 -04:00
Thomas Harte
bfd28a04ba
Remove noise.
2022-03-18 10:41:20 -04:00
Thomas Harte
359ec257c0
Add a further state, seemingly to fix high-res mode.
2022-03-18 08:27:46 -04:00
Thomas Harte
88767e402c
Switch DDFSTART/STOP state machine.
2022-03-17 20:03:36 -04:00
Thomas Harte
e698cbf092
Silence debugging information.
2022-03-13 12:48:05 -04:00
Thomas Harte
f2ce646d8d
Undo 8-cycle-if-met WAIT.
2022-03-13 12:47:48 -04:00
Thomas Harte
acba357df6
Adds empty callouts for all serial port registers.
2021-12-23 15:22:20 -05:00
Thomas Harte
a17c192a9e
Allow chip RAM size selection, while I'm here.
2021-12-22 15:30:19 -05:00
Thomas Harte
1916a9b99c
Remove stdout noise.
2021-12-22 15:22:28 -05:00
Thomas Harte
9796b308dc
Add basic implementation of fast RAM.
2021-12-22 15:17:11 -05:00
Thomas Harte
d0e3024bec
Switch to nibble-oriented lookup tables for fill mode.
2021-12-19 17:16:46 -05:00
Thomas Harte
d2ad149e56
Fill mode always runs right to left.
2021-12-19 16:43:18 -05:00
Thomas Harte
348840a2aa
It's probably a net detriment to use a template in this scenario.
2021-12-19 16:31:44 -05:00
Thomas Harte
3a719633eb
Consolidate interface; correct LOGs.
2021-12-18 19:39:41 -05:00
Thomas Harte
bd69948d37
The Copper can now skip Chipset::perform
.
2021-12-18 17:53:11 -05:00
Thomas Harte
54aa211f56
Avoid infinite loops for completely undefined addresses.
2021-12-18 17:48:45 -05:00
Thomas Harte
f118891970
Breaks Chipset::perform
into read
and write
.
...
This allows each to call the other when a read occurs of a write-only address, and vice versa.
2021-12-18 17:43:53 -05:00
Thomas Harte
dbae3fc9a5
Propagate to bitplanes immediately; fix odd/even confusion.
2021-12-18 16:37:40 -05:00
Thomas Harte
c834960bfb
Withdraw separate x-and-y guess, make MOVE lose a cycle if a sleep/wake occurs.
2021-12-12 19:18:18 -05:00
Thomas Harte
600abc55b5
Compare x and y separately, wake immediately from a sleep, log more.
2021-12-12 17:26:33 -05:00
Thomas Harte
f3ec7d54bb
Clarifies wait-for-CPU-slot semantics.
...
Big bonus: this guarantees `advance_dma`s will be called at most once per output cycle, even if they return `false`.
2021-12-09 19:17:44 -05:00
Thomas Harte
2b0415d552
Attempt to avoid off-by-one buffer reads, add modulation.
2021-12-06 19:28:40 -05:00
Thomas Harte
066e4421e8
Attempt volcntrld.
2021-12-06 06:35:08 -05:00
Thomas Harte
f02a241249
Inserts an additional reload.
2021-12-05 17:47:12 -05:00
Thomas Harte
a5fe1e4259
Largely debugs audio state machine.
...
I think I'm still missing an address reload somewhere though, and attachment doesn't actually push.
2021-12-05 15:27:35 -05:00
Thomas Harte
9b80563443
Exposes targets for modulation.
2021-12-05 06:38:55 -05:00
Thomas Harte
91b5da06e3
Perform reload on Disabled -> WaitingForDummyDMA.
2021-12-04 19:17:40 -05:00
Thomas Harte
7320f96ae7
Capture attachment flags.
2021-12-04 18:02:43 -05:00
Thomas Harte
fdf2b9cd7b
Add local data pointers.
2021-12-04 17:58:41 -05:00
Thomas Harte
bfc70a1b60
Ensure interrupt request bits always propagate.
2021-12-04 16:50:42 -05:00
Thomas Harte
aff7a93106
Move DMAFlags to Flags.hpp.
2021-12-04 08:26:28 -05:00
Thomas Harte
3b027c4593
Switch and -> or for testing transitions from ::PlayingLow.
2021-12-04 08:24:41 -05:00
Thomas Harte
42d3bdd373
Adds a begin_state template.
2021-12-04 07:20:17 -05:00
Thomas Harte
57789092c1
Keep audio fetches in bounds.
2021-12-03 07:16:21 -05:00
Thomas Harte
6bc5268cbd
Reload period counter on low -> high transition.
2021-12-02 18:43:02 -05:00
Thomas Harte
e6fe36f45c
Add buffer-length assert; add <tuple> where std::tuple_size is used.
2021-12-02 12:53:20 -05:00
Thomas Harte
06b6f85d55
Correct stereo.
2021-12-02 11:15:29 -05:00
Thomas Harte
d6f1ea50a6
Switch to slightly more straightforward presumption of no data wanted.
2021-12-02 09:41:16 -05:00
Thomas Harte
9554869886
Simplify DMA logic.
2021-12-02 09:33:02 -05:00
Thomas Harte
364059551c
Add extra notes per errata, plus bonus state code repetitions.
2021-12-02 09:30:52 -05:00
Thomas Harte
06340b1ad7
Advance DMA pointer, treat audio as signed, request data on low -> high transition.
...
There's now some audio, sometimes when there should be. But it's not correct.
2021-12-01 18:34:54 -05:00
Thomas Harte
d23511860d
Attempts audio output.
2021-12-01 06:01:58 -05:00
Thomas Harte
a8dd4660b2
Adds a pipeline for audio output.
2021-12-01 05:37:58 -05:00
Thomas Harte
eb3a0eb3c7
Attempt full implementation of collisions.
2021-11-29 18:39:33 -05:00
Thomas Harte
cd0148e0bc
Switch to a default 1mb of Chip RAM.
2021-11-29 16:55:45 -05:00
Thomas Harte
8584ee609f
Support a fetch window start on line 0.
2021-11-28 05:37:49 -05:00
Thomas Harte
373847e2b7
Avoid posting redundant key events.
2021-11-28 05:31:00 -05:00
Thomas Harte
84f7d8dfc2
Factors out pixel generation, adds HAM.
2021-11-28 05:06:30 -05:00
Thomas Harte
e057a7d0dd
Attempts to implement sprite/playfield priorities.
2021-11-27 15:03:46 -05:00
Thomas Harte
7bab15bf99
Minor copy improvements.
2021-11-27 11:38:41 -05:00
Thomas Harte
dac40630fd
Adds support for the Blitter-busy flag to WAIT and SKIP.
2021-11-27 11:36:15 -05:00
Thomas Harte
33bfa1b81c
Move BitplaneShifter adjacent to expand_bitplane_byte
.
2021-11-26 18:29:09 -05:00
Thomas Harte
8fc27dc292
Moves bitplane collection and shifter out of Chipset.[h/c]pp.
2021-11-26 18:16:24 -05:00
Thomas Harte
f8e8f18be5
Switch to std::clamp
.
2021-11-26 18:10:29 -05:00
Thomas Harte
8b38c567d2
Add missing #include for std::clamp.
2021-11-26 18:08:39 -05:00
Thomas Harte
cd53e42d79
Resolve operator precedence.
2021-11-26 18:08:10 -05:00
Thomas Harte
bea6cf2038
Move mouse and joystick into a separate file, give a common parent.
2021-11-26 17:50:47 -05:00
Thomas Harte
eca80f1425
Sprites: avoid magic constants, ensure proper DMA resumption.
2021-11-26 16:02:18 -05:00
Thomas Harte
1c0962e53c
Move sprites into their own source file.
2021-11-26 15:30:31 -05:00
Thomas Harte
4b21549ff4
Add a couple of static asserts.
2021-11-26 15:23:54 -05:00
Thomas Harte
30d7b0129b
Correct sprite ordering within pairs.
2021-11-26 11:58:50 -05:00
Thomas Harte
ce6877d6e4
Sprites: infer part of DMA state from slot, no access during blank.
...
Also sets the proper vertical blank length.
2021-11-26 09:37:52 -05:00
Thomas Harte
0ab5177637
Allow DMAState::FetchStopAndControl on y == v_stop_.
2021-11-25 14:29:12 -05:00
Thomas Harte
276cbfa505
Simplify sprite state machine.
...
This now better matches the explanation given on Page 133 of the Amiga System Programmer's Guide.
2021-11-25 14:08:55 -05:00
Thomas Harte
012084b37b
Fix exclusive fill, sizing, eliminate ECS call-ins.
...
The clock test now proceeds further, but still doesn't seem to pass.
2021-11-24 17:25:32 -05:00
Thomas Harte
7af5737ec5
Switch to LOG
.
2021-11-24 16:15:40 -05:00
Thomas Harte
0df8173536
Merge branch 'master' into Amiga
2021-11-24 08:58:03 -05:00
Thomas Harte
f5d3d6bcea
Splits the lowpass filter into push and pull variants.
2021-11-21 15:37:29 -05:00
Thomas Harte
a8a99f647f
Further improves framing.
2021-11-21 08:13:55 -05:00
Thomas Harte
ff68b26c44
Push HSYNC 11 slots over, to its proper position, and add a frame crop.
2021-11-20 12:39:50 -05:00
Thomas Harte
a94b4f62fd
Takes a stab at attached sprites.
2021-11-19 14:19:47 -05:00
Thomas Harte
bcc959d938
Sprites: deconflate vertical and modification flags; disarm on CTL not POS.
2021-11-19 08:03:10 -05:00
Thomas Harte
cf25d8a378
Increase logging (but leave it disabled).
2021-11-19 08:01:23 -05:00
Thomas Harte
693d46f8ea
Mask by index, not colour.
2021-11-18 05:36:38 -05:00
Thomas Harte
3496ebd1d7
Constrain sprite fetches to Chip RAM.
2021-11-17 17:49:42 -05:00
Thomas Harte
be763cf7fe
Expose joystick to the world.
2021-11-17 15:33:46 -05:00
Thomas Harte
c3b4bee210
Adds a joystick class.
2021-11-17 14:26:51 -05:00
Thomas Harte
6df0227ab1
Hacks in a basic effort at dual playfields.
2021-11-16 18:26:27 -05:00
Thomas Harte
2a3a7fa8a0
Reset will_request_interrupt
.
2021-11-15 16:00:35 -05:00
Thomas Harte
50a6496399
Avoids over-greedy DMA.
2021-11-15 12:31:15 -05:00
Thomas Harte
c99dee86dd
Adds missing low -> high actions, implements more transitions.
2021-11-15 12:29:32 -05:00
Thomas Harte
0c5bb9626b
Separates state transitions and tests.
2021-11-15 05:29:28 -05:00
Thomas Harte
a9971917f5
Attempts a translation of Commodore's documentation.
2021-11-14 14:54:33 -05:00
Thomas Harte
4c62611da3
Adds enough state machine to get into the near-incomprehensible stuff on the right.
2021-11-14 10:48:50 -05:00
Thomas Harte
47f36f08fb
Switches to a synchronous audio state machine; renames advance -> advance_dma.
...
I can worry about how to just-in-time things once I better understand the hardware in general.
2021-11-13 15:53:41 -05:00
Thomas Harte
f906bab1a5
Provides feedback on interrupt flags, starts on state machine.
2021-11-13 11:05:39 -05:00
Thomas Harte
fffc03c4e4
Propagates time to the audio subsystem.
2021-11-12 15:30:52 -05:00
Thomas Harte
0a94184d6b
Provides a greater wealth of audio data.
2021-11-11 09:24:15 -05:00
Thomas Harte
7be3578497
Adds a target for audio writes.
2021-11-09 07:11:23 -05:00
Thomas Harte
eeaccb8ac0
Implements clear_all_keys
.
2021-11-08 17:49:09 -05:00
Thomas Harte
8ef9a932aa
Adds inclusive fill test; fixes inclusive fills.
2021-11-07 14:26:13 -08:00
Thomas Harte
31e22e4cfb
Provides full serial input.
2021-11-07 05:19:16 -08:00
Thomas Harte
ecfe68d70f
Introduce the principle that a Serial::Line can be two-wire — clock + data.
2021-11-06 16:54:20 -07:00
Thomas Harte
c0c2b5e3a9
Post key actions to the nominated serial line.
...
Albeit that I'm still thinking through whether I want the option of including a clock on Serial::Line. It'd be natural in one sense — there's already one built in — but might weaken Serial::Line's claim to be a one-stop shop for both enqueued and real-time connections without a reasonable bit of extra work.
2021-11-06 12:03:09 -07:00
Thomas Harte
471e13efbc
Transcribes keycodes.
2021-11-04 18:54:42 -07:00
Thomas Harte
c9bf2dda16
Attempt implementation of disk sync.
2021-11-02 18:18:59 -07:00
Thomas Harte
3ceb378b9b
Relocate disk logic into a separate compilation unit.
2021-11-02 17:35:23 -07:00
Thomas Harte
1cf1c90511
Adds support for interlaced output.
2021-11-02 14:34:03 -07:00
Thomas Harte
d989825216
Add bonus notes on VPOSR.
2021-11-02 03:47:39 -07:00
Thomas Harte
3976420b88
Retains a little more of output controls.
2021-11-01 17:15:36 -07:00
Thomas Harte
2f1ce5fe43
Switch to using the swizzled palette for playfield output.
2021-11-01 14:44:30 -07:00
Thomas Harte
42145a5b8a
Delay bitplane installation until end of slot.
2021-11-01 14:18:58 -07:00
Thomas Harte
4e66017205
Enable sprite reuse and toggle to inactive when visible region is over.
2021-10-31 16:52:48 -07:00
Thomas Harte
299d517449
Performs a first implementation of fill mode.
2021-10-31 14:36:31 -07:00
Thomas Harte
4c1ab6ff25
Rethinks bitplane stops.
2021-10-31 09:01:38 -07:00
Thomas Harte
16f31cab6a
Avoid duplication of CIA select test.
2021-10-30 12:05:18 -07:00
Thomas Harte
02c88e6826
VHPOSR's fields are the other way around.
2021-10-30 12:04:46 -07:00
Thomas Harte
d25804f4a2
Throws in official register names.
2021-10-29 14:05:11 -07:00
Thomas Harte
edb75e69cb
Implement bitplane modulos.
2021-10-29 11:29:22 -07:00
Thomas Harte
f3e895f17c
Tag intended unused parameters.
2021-10-29 06:21:02 -07:00
Thomas Harte
b952d73e83
Disallow programmatic setting of blitter status.
2021-10-29 06:19:57 -07:00
Thomas Harte
07facc0636
Takes a stab at BZERO.
2021-10-28 18:12:46 -07:00
Thomas Harte
da1a69be27
Caps mouse speed.
...
Also takes another guess at CIA interrupt bits. To no avail.
2021-10-27 18:38:02 -07:00
Thomas Harte
b10f5ab110
Apply A mask when loading into barrel shifter.
2021-10-26 20:02:28 -07:00
Thomas Harte
b4286bb42b
Modulos are subtracted in descending mode.
2021-10-26 07:21:51 -07:00
Thomas Harte
139d35c6f9
Switches to basic use of sprite shifters.
2021-10-25 20:58:48 -07:00
Thomas Harte
cb24457b4a
Starts on a two-at-a-time sprite shifter.
2021-10-25 16:30:30 -07:00
Thomas Harte
9f3efb7f05
Limits graphical output to [all but one bit] of the display window.
2021-10-25 14:12:23 -07:00
Thomas Harte
e6001e0f22
Shifts bitplanes irrespective of output window.
2021-10-25 13:59:39 -07:00
Thomas Harte
c6535bf035
Switches bitplane shifter to returning four high-res pixels at a time.
2021-10-25 13:34:36 -07:00
Thomas Harte
7118a515e0
Reduce logging in trustworthy areas.
2021-10-23 20:36:41 -07:00
Thomas Harte
952451c9b8
Add mouse input.
2021-10-23 20:17:13 -07:00
Thomas Harte
610327a04e
Fix sprite H start bit order.
2021-10-22 23:20:20 -07:00
Thomas Harte
2121e32409
Fix sprite bit ordering.
2021-10-22 21:10:01 -07:00
Thomas Harte
7ec21edc2f
Attempts to hack in some form of sprite display.
2021-10-22 19:51:10 -07:00
Thomas Harte
003162f710
Limit to specific purpose.
2021-10-22 16:16:19 -07:00
Thomas Harte
040ac93042
Takes a shot at the vertical stuff of sprite DMA.
2021-10-22 14:32:59 -07:00
Thomas Harte
b489ba3d0d
Adds sprite DMA windows.
2021-10-22 13:07:20 -07:00
Thomas Harte
c5e8b547af
Captures the attach flag and observes activation rule.
2021-10-22 11:21:58 -07:00
Thomas Harte
e67de90ad0
Starts to bring sprites inside DMADevice orthodoxy.
2021-10-21 21:57:46 -07:00
Thomas Harte
c3c84c88a1
Switch to ahead-of-time planar to chunky conversion.
2021-10-21 20:48:57 -07:00
Thomas Harte
0dc9c4cee1
Undo hard-coding of fetch window.
2021-10-19 15:18:39 -07:00
Thomas Harte
b312a61a81
Add two dummy reads.
2021-10-16 13:30:45 -07:00
Thomas Harte
4917556a99
The shift goes the other way in descending mode.
2021-10-16 11:09:40 -07:00
Thomas Harte
aa6b0f07b7
Correct filename.
2021-10-16 05:37:46 -07:00
Thomas Harte
e27a10bde4
Simplify control flow.
2021-10-14 16:47:18 -07:00
Thomas Harte
253a199f27
Fire sync-match interrupt upon any match.
2021-10-14 16:36:17 -07:00
Thomas Harte
61e5702520
Remove dead TODO.
2021-10-14 16:09:11 -07:00
Thomas Harte
b12c640807
Makes drives non-copyable.
...
To avoid error in the future.
2021-10-14 12:37:55 -07:00
Thomas Harte
9be23ecc34
Add end-of-Blit interrupt.
...
Along with a slightly easier path for posting interrupts, in C++ compilation unit terms.
2021-10-13 15:09:19 -07:00
Thomas Harte
eec068914e
Slightly improve logging.
2021-10-11 18:05:57 -07:00
Thomas Harte
39b8285ba5
Trust the HRM on step bit, but catch rising edge.
2021-10-11 07:42:42 -07:00
Thomas Harte
7733fef3bd
DSKLEN has to be written twice.
2021-10-11 06:16:01 -07:00
Thomas Harte
6acddfdb98
Add the sync match interrupt.
...
Albeit that it doesn't yet unblock disk DMA.
2021-10-11 03:37:56 -07:00
Thomas Harte
99492c2ec2
Further tweak logging.
2021-10-10 18:19:50 -07:00
Thomas Harte
846b505d27
Reduce logging; disk data probably isn't the immediate obstacle.
2021-10-10 13:04:10 -07:00
Thomas Harte
8d43b4a98d
Expands Disk DMA access window.
2021-10-10 11:47:02 -07:00
Thomas Harte
9336ffe216
Take a stab at index-hole sync.
2021-10-09 08:01:02 -07:00
Thomas Harte
eb157f15f3
Adds index hole interrupt.
2021-10-09 04:08:59 -07:00
Thomas Harte
d6e2a3f425
Make a first attempt to spool into RAM.
2021-10-08 18:11:47 -07:00
Thomas Harte
b47ca13ed3
Push disk data onwards.
2021-10-08 17:18:11 -07:00
Thomas Harte
67546c4d6e
Per the HRM, the index hole is connected to CIA B, potentially to raise an interrupt.
2021-10-08 17:12:37 -07:00
Thomas Harte
f72deb0a5c
Correct RDY position.
2021-10-08 04:32:13 -07:00
Thomas Harte
616ccbb878
Correct ID bit placement, multiplex with motor state.
...
The latter per my reading of http://www.primrosebank.net/computers/amiga/upgrades/amiga_upgrades_storage_fdis.htm
2021-10-08 04:05:57 -07:00
Thomas Harte
5899af0038
Starts accumulating disk data.
2021-10-07 05:11:32 -07:00
Thomas Harte
33ff4f3b5c
Eliminate drive copies.
2021-10-06 13:40:28 -07:00
Thomas Harte
20bad38d42
Add drive activity lights.
2021-10-06 04:54:40 -07:00
Thomas Harte
92a07398cd
I think CHNG works the other way around.
2021-10-06 04:47:52 -07:00
Thomas Harte
e961d0b4a3
Switch RDY type.
2021-10-06 04:41:09 -07:00
Thomas Harte
2253ff656a
Adds route for inserting disks.
2021-10-05 16:12:30 -07:00
Thomas Harte
18631399ad
Attempts to clock the disk controller.
2021-10-05 15:38:56 -07:00
Thomas Harte
ad4afcdcd5
Switch stepping direction.
...
Empirically, based on the actions of Kickstart, and assuming my confusion is because the relevant signal is active low.
2021-10-05 15:23:48 -07:00
Thomas Harte
2cf5bcc5db
Clarify logic somewhat.
2021-10-05 15:20:05 -07:00
Thomas Harte
1180ad7662
Disables a couple of now-trustworthy LOGs.
2021-10-05 06:51:47 -07:00
Thomas Harte
5463cd1ae3
Attempts to support stepping and head selection.
2021-10-05 06:36:17 -07:00
Thomas Harte
647ec770ce
Implements motor latching, drive ID shift registers.
2021-10-05 05:12:01 -07:00
Thomas Harte
e47bec2e65
Switch CIA B ports over.
2021-10-05 03:38:11 -07:00
Thomas Harte
674941abdf
Starts to add a disk controller.
2021-10-04 16:45:05 -07:00
Thomas Harte
b3f0ca39ed
Adds some unused drives.
2021-10-04 08:12:13 -07:00
Thomas Harte
5ccb512883
Moves the CIAs into the Chipset class.
...
This reflects the routing of interrupt signals for now, but also prepares for the addition of disk drives.
2021-10-04 06:44:54 -07:00
Thomas Harte
da286d5ae8
Switch spaces to tabs.
2021-10-04 05:27:25 -07:00
Thomas Harte
a282a51673
Remove last of the direct printf'ing.
2021-09-30 02:42:59 -04:00
Thomas Harte
b7b13e20d1
Single column blits should use both masks.
2021-09-29 22:49:35 -04:00
Thomas Harte
402fa41bc0
Corrects initial error value.
2021-09-29 22:19:17 -04:00
Thomas Harte
0b9ebafc0f
Flip bit deserialisation order.
2021-09-28 22:12:13 -04:00
Thomas Harte
140e24ef15
Grab further copy flags.
2021-09-28 22:11:58 -04:00
Thomas Harte
ffcd2ea10c
Attempts more properly to implement line mode.
2021-09-28 21:39:09 -04:00
Thomas Harte
cb460de94d
Makes bad first attempt at a Bresenham inner loop.
2021-09-27 22:06:00 -04:00
Thomas Harte
f6624bf776
Edges mildly closer to line output.
2021-09-26 19:18:12 -04:00
Thomas Harte
b4b6c4d86f
Attempts to support left and right masks.
2021-09-26 18:42:08 -04:00
Thomas Harte
759689ff31
Fix line mode flag, add busy status.
2021-09-26 18:16:00 -04:00
Thomas Harte
9012a7f5e1
Merge branch 'master' into Amiga
2021-09-23 23:00:03 -04:00
Thomas Harte
e5a5faa417
Resolves Clang 13 implicit conversion warnings.
2021-09-23 22:53:41 -04:00
Thomas Harte
c4ab2bbeed
Hard-code fetch window width. For now.
2021-09-23 22:06:13 -04:00
Thomas Harte
42ef459e20
Resolve resting values.
2021-09-23 22:05:59 -04:00
Thomas Harte
cad1a9e0f1
Correct bit test.
2021-09-23 20:42:31 -04:00
Thomas Harte
f1d514470d
Add note to future self.
2021-09-23 20:29:39 -04:00
Thomas Harte
9a7a54f22f
Take alternative guess as to meaning of 'use' bits.
2021-09-23 18:42:12 -04:00
Thomas Harte
137d1c61bd
Allow for channel enables and blitting direction.
2021-09-23 18:38:37 -04:00
Thomas Harte
adc071ed7a
Fix: modulos are 15-bit signed, the minterms are also in regular BLTCON0.
2021-09-23 18:30:35 -04:00
Thomas Harte
e06f470044
Ensure no implicit conversion from int to IntT.
2021-09-23 18:30:04 -04:00
Thomas Harte
ab69fe56c9
Take a first shot at magical instant blitting.
2021-09-23 18:13:51 -04:00
Thomas Harte
60bad22a91
Correct fetch window.
2021-09-23 18:13:24 -04:00
Thomas Harte
7092429f7c
Added some notes to self on line mode.
2021-09-20 23:08:26 -04:00
Thomas Harte
fa800bb809
Introduces code for minterm application.
2021-09-20 19:13:23 -04:00
Thomas Harte
e15f1103a0
Takes a shot at low resolution shifting.
2021-09-20 19:00:52 -04:00
Thomas Harte
a4263b5a8c
Ties bitplane collection to line position.
...
Outgoing bug: incrementing the video relative offset too often, due to cycles that are discovered to be CPU-targetted.
2021-09-19 21:55:45 -04:00
Thomas Harte
245b7baa61
Moves the Copper into its own file.
2021-09-16 21:17:23 -04:00
Thomas Harte
0eeaaa150a
Correct Copper start address.
2021-09-16 21:01:37 -04:00
Thomas Harte
692d87f446
Attempts to restrict blitter slot allocation.
2021-09-16 19:56:28 -04:00
Thomas Harte
6572efe2a7
Clarifies word addressing.
2021-09-16 08:24:52 -04:00
Thomas Harte
8aac2bd029
Stubs in serial port status.
2021-09-14 21:53:07 -04:00
Thomas Harte
add11db369
Factors out DMADevice, which is now a parent of Blitter.
2021-09-14 20:51:32 -04:00
Thomas Harte
e47eab1d40
Merge branch 'master' into Amiga
2021-09-14 20:27:59 -04:00
Thomas Harte
fa71ae3174
Add apology.
2021-09-14 20:23:36 -04:00
Thomas Harte
dfcd1508c9
Establishes valid initial BRAM.
2021-09-10 19:56:20 -04:00
Thomas Harte
7e5fc4444a
Default to ROM01.
2021-09-09 22:09:09 -04:00
Thomas Harte
d8e42c4379
Tweak guess at initial state.
2021-09-09 22:06:36 -04:00
Thomas Harte
dd37fa49a0
Stabilises Apple IIgs display.
2021-09-09 20:08:15 -04:00
Thomas Harte
fd70f7ad43
Attempts to make pixel content observeable.
2021-09-08 20:57:26 -04:00
Thomas Harte
6e034c9b7f
At least manages to place a pixel region on screen.
...
Albeit that I've suddenly realised that I've failed properly to think about high-res versus low-res.
2021-08-11 20:31:37 -04:00
Thomas Harte
52e375a985
Move towards playfield decoding.
2021-08-11 18:47:35 -04:00
Thomas Harte
10a5e7313f
Makes a buggy first attempt at bitplane data collection.
2021-08-10 21:28:48 -04:00
Thomas Harte
ec9cb21fae
Starts towards bitplane collection.
2021-08-10 19:01:41 -04:00
Thomas Harte
fdd02ad6a6
Neaten, slightly.
2021-08-10 09:20:34 -04:00
Thomas Harte
76e9fcc94a
Obey blitter DMA-enable mask.
2021-08-10 09:19:15 -04:00
Thomas Harte
e412927415
Logs a bit more from the Blitter, gives it access to slots.
2021-08-10 07:17:01 -04:00
Thomas Harte
dda154c7c6
Adds nonsense disk reads, which seems to lead to bitplane and blitter requests.
...
Progress, at last!
2021-08-09 20:31:14 -04:00
Thomas Harte
9215535bee
Adds a container for the disk controller.
...
Thereby appears to prove that my Amiga is getting as far as attempting to load from floppy.
2021-08-09 17:35:09 -04:00
Thomas Harte
86c6248b48
Merge branch 'master' into Amiga
2021-08-09 17:09:04 -04:00
Thomas Harte
1502c4530e
Takes a further step towards real timing.
2021-08-08 21:52:28 -04:00
Thomas Harte
c1df4d1c0b
Mirroring is correct.
2021-08-08 20:20:12 -04:00