Thomas Harte
06f1e64177
Advances to IO.
2021-04-12 21:41:20 -04:00
Thomas Harte
b42780173a
Establishes that there really is no Read4 and Read4Pre distinction.
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Will finish these unit tests, then clean up.
2021-04-12 20:54:10 -04:00
Thomas Harte
36c8821c4c
Reaches the halfway point in tests.
2021-04-12 17:29:03 -04:00
Thomas Harte
947de2d54a
Switches five-cycle read to a post hoc pause.
2021-04-12 17:17:08 -04:00
Thomas Harte
9347fe5f44
Advances to next failing test: LD (ii+n), n.
2021-04-12 17:11:58 -04:00
Thomas Harte
e82367def3
Switches to test-conformant behaviour for (IX/IY+n) opcode fetches.
2021-04-11 23:01:00 -04:00
Thomas Harte
9cde7c12ba
Shifts responsibility for refresh into the fetch-decode-execute sequence.
2021-04-11 22:50:24 -04:00
Thomas Harte
015556cc91
Switch (ii+n) to Read4Pre.
2021-04-11 10:26:14 -04:00
Thomas Harte
47c5a243aa
Restructures, the better to explore errors.
2021-04-10 21:32:42 -04:00
Thomas Harte
070e359d82
Introduces failing test for BIT b, (ii+n).
2021-04-10 18:00:23 -04:00
Thomas Harte
b397059d5e
Moves read time in Read4Pre.
2021-04-10 17:54:20 -04:00
Thomas Harte
400f54e508
Introduces failing test for bit b, (hl).
2021-04-10 12:04:48 -04:00
Thomas Harte
e0736435f8
Makes assumption that the address bus just holds its value during an internal operation.
2021-04-10 12:00:53 -04:00
Thomas Harte
b09c5538c6
Adds failing test for simple (ii+n) tests.
2021-04-09 21:28:35 -04:00
Thomas Harte
ce3d2913bf
Advances to 9 source table rows tested out of 37.
2021-04-09 20:38:17 -04:00
Thomas Harte
87202a2a27
Add two further tests, add checking of collected data size for all tests.
2021-04-09 18:32:03 -04:00
Thomas Harte
818a4dff25
Corrects ADD HL, dd test.
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Or, at least, likely corrects. The bus cycle breakdown in the Z80 data sheet implies these accesses should come after completion of the refresh cycle, not during its long tail, so I think +1 is correct.
2021-04-08 22:23:15 -04:00
Thomas Harte
eacffa49f5
Exposes IR during 'internal' operations.
2021-04-08 22:22:26 -04:00
Thomas Harte
9e506c3206
Adds failing ADD hl, dd test.
2021-04-08 22:19:22 -04:00
Thomas Harte
29cf80339a
Corrects too-short buffer.
2021-04-08 22:15:03 -04:00
Thomas Harte
50f53f7d97
Adds INC/DEC rr and LD SP, HL tests.
2021-04-08 22:14:53 -04:00
Thomas Harte
73fbd89c85
Correct opcodes, ability to terminate on a single-cycle contention.
2021-04-08 22:09:33 -04:00
Thomas Harte
f74fa06f2d
Introduces failing test for LD [A/I/R], [A/I/R].
2021-04-08 20:28:55 -04:00
Thomas Harte
ee989ab762
Fills in the rest of the simple two-byte instructions.
2021-04-08 20:13:52 -04:00
Thomas Harte
818655a9b6
Starts on two-bus-cycle instructions, correcting validators.
2021-04-08 20:01:46 -04:00
Thomas Harte
57a7e0834f
Corrects sampling of MREQ.
2021-04-08 19:21:35 -04:00
Thomas Harte
cd787486d2
Tests all of the single-byte, no-access opcodes.
2021-04-07 22:07:52 -04:00
Thomas Harte
67fd6787a6
Builds what I think I need to validate Z80 address, MREQ, IOREQ and RFSH.
2021-04-07 21:57:40 -04:00
Thomas Harte
627b96f73c
Merge branch 'master' into Z80Lines
2021-04-07 21:02:15 -04:00
Thomas Harte
8a6985c2e8
Merge pull request #909 from TomHarte/BackToFive
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Tweaks video timing, again.
2021-04-06 21:16:50 -04:00
Thomas Harte
60e8273de2
Tweaks video timing, again.
2021-04-06 21:04:54 -04:00
Thomas Harte
aa8ce5c1ac
Merge pull request #908 from TomHarte/ZXSpectrumInterrupts
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Better indicate ZX Spectrum interrupt timing.
2021-04-06 13:49:25 -04:00
Thomas Harte
dd28246f9f
Better indicate interrupt timing.
2021-04-06 12:06:13 -04:00
Thomas Harte
dc25a60b9b
Merge pull request #907 from TomHarte/TMSSequencePoints
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Makes the TMS a sequence-point-generating JustInTimeActor.
2021-04-06 12:03:22 -04:00
Thomas Harte
094d623485
Updates unit tests.
2021-04-05 21:33:04 -04:00
Thomas Harte
1266bbb224
Makes the TMS a sequence-point-generating JustInTimeActor.
2021-04-05 21:02:37 -04:00
Thomas Harte
bd1ea5740a
Merge pull request #906 from TomHarte/LoadingImprovements
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Attempts to improve ZX fast-loading compatibility
2021-04-05 19:20:46 -04:00
Thomas Harte
3e04b51122
Walks back pretty names. Probably a bad idea.
2021-04-05 17:26:18 -04:00
Thomas Harte
76f2aba51a
Makes use of pretty names in descriptions optional.
2021-04-05 17:24:16 -04:00
Thomas Harte
fd88071c0a
Remove further detritus.
2021-04-05 17:21:26 -04:00
Thomas Harte
16bfe1a55c
Resolves use-after-return memory error.
2021-04-04 22:45:56 -04:00
Thomas Harte
90c3d6a1e8
Attempts a later interception of tape loading.
2021-04-04 22:39:30 -04:00
Thomas Harte
18d6197d6c
Makes provision for pretty-printed key names.
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i.e. keys that don't fit C++ naming rules.
2021-04-04 22:20:35 -04:00
Thomas Harte
27eddf6dff
Merge pull request #905 from TomHarte/JustInTimeOric
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Adopts JustInTimeActor in the Oric.
2021-04-04 20:57:52 -04:00
Thomas Harte
57b32d9537
Avoid adding additional threading constraints.
2021-04-04 20:48:15 -04:00
Thomas Harte
837b9499d5
Translates Oric video and Disk II into JustInTimeActors.
2021-04-04 20:43:16 -04:00
Thomas Harte
c2fde2b147
Merge pull request #900 from TomHarte/SpeccyTiming
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Further tweaks Spectrum timing.
2021-04-04 20:19:54 -04:00
Thomas Harte
f26bf4b9e4
Splitting here isn't achieving anything.
2021-04-04 19:52:38 -04:00
Thomas Harte
1da51bee6c
14368 and six seem to be the proper numbers, per my comprehension of Patrick Rak.
2021-04-04 19:52:19 -04:00
Thomas Harte
5a66956221
Merge branch 'master' into SpeccyTiming
2021-04-04 19:12:37 -04:00
