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1281 Commits

Author SHA1 Message Date
Thomas Harte
bf5ed98f35 Generalise 65c02 behaviour. 
Partly to convince myself:
1. this change alters behaviour of `CycleAddXToAddressLowRead`
2. which affects only `AbsoluteXw` and the 65c02-specific `JMP (abs, x)`;
3. `AbsoluteXw` is then used only by `AbsoluteXWrite` and `AbsoluteXReadModifyWrite`;
4. `AbsoluteXWrite` is used for abs, x addressing by `SHY`, `STA` and `STZ`;
5. `AbsoluteXReadModifyWrite` is used for `ASL`, `ASO`, `ROL`, `RLA`, `LSR`, `LSE`, `ROR`, `RRA`, `DEC`, `DCP`, `INC` and `INS`.

... though many of the latter are replaced by instance of `FastAbsoluteXReadModifyWrite` for the 65c02 which don't include a dummy
access at all if the page boundary is crossed so the issue is moot.
 2023-12-20 22:02:14 -05:00
Thomas Harte
f25aaf2bb3 Adjust 65c02 STA abs,x behaviour. 2023-11-29 15:32:02 -05:00
Thomas Harte
7171e24ccf Enable further compile-time optimisations. 2023-11-28 13:50:53 -05:00
Thomas Harte
36a4629ce0 Explain new semantics. 2023-11-27 21:49:57 -05:00
Thomas Harte
5c7f94d2ef Introduce the possibility of operation type as a template parameter. 
It's already proven possible to provide this for instruction fetch, so I think it'll immediately be a win. But more importantly it opens a path forwards for further improvement.
 2023-11-27 11:48:34 -05:00
Thomas Harte
e46e42d896 This is the same test either way around. 2023-10-09 16:47:02 -04:00
Thomas Harte
1cb26cb141 Pull add/sub distinction into templates. 2023-10-09 16:40:50 -04:00
Thomas Harte
873b1122ab Correct SHA, SHX, SHY, SHS when page boundary crossed. 2023-09-21 15:31:04 -04:00
Thomas Harte
74b5ad93c4 Don't necessarily apply D for ARR. 2023-09-20 10:17:00 -04:00
Thomas Harte
43dfb729d3 Explain even better. 2023-09-02 14:45:53 -04:00
Thomas Harte
543be49cf8 Merge branch 'master' into 65C02BCDTest 2023-09-01 16:39:18 -04:00
Thomas Harte
1fb278c9f1 Fix abs,x NOP length. 2023-09-01 14:31:21 -04:00
Thomas Harte
19ec63b4fb Add exposition, slightly simplify, unbreak INS. 2023-09-01 09:29:35 -04:00
Thomas Harte
4d6ffa7a2e With some degree of hit and hope, correct 65C02 results. 2023-08-31 15:28:59 -04:00
Thomas Harte
39ee75d94a Clean up decimal SBC implementation. 2023-08-31 15:02:17 -04:00
Thomas Harte
13be247495 Comment. 2023-08-30 23:08:42 -04:00
Thomas Harte
cdcac7c11c Simplify top nibble handling. 2023-08-30 23:07:54 -04:00
Thomas Harte
67cd5dd63b Simplify top nibble decision. 2023-08-30 23:06:00 -04:00
Thomas Harte
139a1a2acc Clean up decimal ADC. 2023-08-30 23:04:38 -04:00
Thomas Harte
5dae726857 Differentiate non-fetching and fetching NOPs. 2023-08-29 16:50:39 -04:00
Thomas Harte
7815d18676 Merge branch 'master' into 65816StackAgain 2023-08-19 15:55:45 -04:00
Thomas Harte
ca75822dbe Fix restart_operation_fetch. 2023-08-17 15:42:34 -04:00
Thomas Harte
d9df568dab Add faulty restart_operation_fetch. 2023-08-17 15:38:28 -04:00
Thomas Harte
26343148ae Use simplified control lines when appropriate. 2023-08-17 15:32:02 -04:00
Thomas Harte
fd0fe66851 Omit unsupported registers and flags. 2023-08-17 15:24:08 -04:00
Thomas Harte
833613b68a Fix S top byte overwrite. 2023-08-17 14:50:55 -04:00
Thomas Harte
42024c1573 Don't allow setting of an invalid S. 2023-08-07 09:19:20 -04:00
Thomas Harte
54103f1f34 Fix SH=1 reset; appropriate TCS. 2023-08-05 15:06:18 -04:00
Thomas Harte
c0eb401d04 Add a between-instructions enforcement of SH = 1. 2023-08-05 14:57:43 -04:00
Thomas Harte
2262725010 Reveal 16-bit stack pointer when asked, regardless of mode. 2023-07-31 17:08:02 -04:00
Thomas Harte
e61a4eb5a9 Regularise PHD and PLD. 2023-07-30 16:36:29 -04:00
Thomas Harte
acd7f9f4cd Fix stack usage of JSL. 2023-07-30 16:34:42 -04:00
Thomas Harte
9f1a657cc4 Fix stack usage of PEA. 2023-07-30 16:33:44 -04:00
Thomas Harte
e52d1866ab Fix PEI stack usage. 2023-07-30 16:32:56 -04:00
Thomas Harte
a02b8222fa Fix stack usage of PER. 2023-07-30 16:29:56 -04:00
Thomas Harte
3762ee1a63 Fix stack usage of PHD. 2023-07-30 16:29:15 -04:00
Thomas Harte
3ec61e8770 Fix stack usage of RTL. 2023-07-30 16:27:13 -04:00
Thomas Harte
2f7dd0b01a Correct stack behaviour of PLD. 2023-07-30 16:26:29 -04:00
Thomas Harte
3a02c22072 Provide an always-16bit-address route to the stack. 2023-07-30 16:25:51 -04:00
Thomas Harte
0f1468adfd Correct wrapping behaviour for (d, x). 2023-07-28 13:39:21 -04:00
Thomas Harte
e9347168e6 Don't alter the data bank upon BRK, COP, IRQ, etc. 2023-07-28 10:53:02 -04:00
Thomas Harte
8578dfbf22 Eliminate various other errant spaces. 2023-05-16 16:40:09 -04:00
Thomas Harte
a1a7c0e253 Apply maybe_unused judiciously. 2023-05-15 10:17:04 -04:00
Thomas Harte
50343dec43 Eliminate all whitespace-only lines. 2023-05-12 14:16:39 -04:00
Thomas Harte
28c79b2885 Eliminate redundant [space][tab] pairs. 2023-05-12 14:14:45 -04:00
Thomas Harte
f6acee18cc Eliminate type-in-function-name from 6502-world. 2023-05-10 18:53:38 -05:00
Thomas Harte
3af30b1fec Update documentation. 2023-05-10 18:46:46 -05:00
Thomas Harte
a8cc74f9fe Further eliminate naming. 2023-05-10 18:46:21 -05:00
Thomas Harte
10cd2a36cf Avoid type-in-function-name, Z80 edition. 2023-05-10 18:42:19 -05:00
Thomas Harte
809cd7bca9 Remove the 68000's Mk2 suffix. 2023-05-10 17:13:01 -05:00
Thomas Harte
e56db3c4e5 Eliminate the old 68000 implementation. 2023-05-10 17:06:27 -05:00
Thomas Harte
2b56b7be0d Simplify namespace syntax. 2023-05-10 16:02:18 -05:00
Thomas Harte
ed2d4ebb0c Fix test (and commentary) for shortened emulated branches. 2023-04-15 23:30:30 -04:00
Thomas Harte
107cb18df4 Fix perceives S in emulated stack-relative mode. 2023-04-14 00:04:44 -04:00
Thomas Harte
9a56d053f8 Introduce/extend 68k enums to cover 68020 instruction set. 2022-10-22 15:20:30 -04:00
Thomas Harte
98d3da62b5 Apply E mode wrap for d,x and d,y only when DL = 0. 2022-09-09 16:02:35 -04:00
Thomas Harte
45dc99fb9d Further improve exposition. 2022-09-09 15:48:25 -04:00
Thomas Harte
1a7509e860 Properly announce ::SameAddress. 2022-09-05 22:26:45 -04:00
Thomas Harte
93c1f7fc90 Include prefetch in 68000 state. 2022-09-05 22:00:04 -04:00
Thomas Harte
cce449ba8f Merge branch 'master' into EventDriven 2022-07-12 15:06:52 -04:00
Thomas Harte
4ddbf095f3 Fully banish flush from the processors. 2022-07-12 10:49:53 -04:00
Thomas Harte
3a2d27a636 Correct for switched BRK presumption. 2022-07-08 11:15:48 -04:00
Thomas Harte
a5b7ef5498 Further compact list of potential switch targets. 2022-06-30 08:31:51 -04:00
Thomas Harte
11305c2e6b Eliminate large gap in case values. 2022-06-29 21:40:48 -04:00
Thomas Harte
b1d8a45339 Just disable the diagnostic. 2022-06-29 21:13:00 -04:00
Thomas Harte
c133f80c73 Try a compiler-specific attribute. 2022-06-29 19:20:44 -04:00
Thomas Harte
58b04cdfa4 Switch to an alternative form of avoiding unused goto warnings. 2022-06-29 19:08:41 -04:00
Thomas Harte
c2938a4f63 Avoid potential classic macro error with address. 2022-06-29 15:09:52 -04:00
Thomas Harte
e0ec3c986d Ensure appropriate data bus size. 2022-06-25 21:07:29 -04:00
Thomas Harte
fc1952bf42 Add an automatic bus size selector. 
This fixes the Jeek test.
 2022-06-25 16:28:06 -04:00
Thomas Harte
4467eb1c41 Ensure relevant throwaway stack reads use the previous stack address. 
TODO: can CycleFetchPreviousThrowaway be used more widely?
 2022-06-24 14:00:03 -04:00
Thomas Harte
1c1ce625a7 Vector reads signal VDA. 2022-06-24 10:37:39 -04:00
Thomas Harte
069a057a94 Resolve assumption of arithmetic shifts. 2022-06-24 07:26:07 -04:00
Thomas Harte
4ed3b21bf3 Decimal SBC tweak: negative partial results don't cause carry. 2022-06-23 21:58:09 -04:00
Thomas Harte
a23b0f5122 Map STA (d), y to correct calculator. 2022-06-23 20:57:47 -04:00
Thomas Harte
da552abf75 Fix BIT overflow flag. 2022-06-23 15:24:51 -04:00
Thomas Harte
380b5141fb Be overt about conversion wanted here. 2022-06-23 13:03:26 -04:00
Thomas Harte
66775b2c4e Always consume a second cycle in 16-bit mode. 2022-06-23 12:46:51 -04:00
Thomas Harte
2c12a7d968 Make absolutely sure there's no address bit 24. 2022-06-23 12:12:02 -04:00
Thomas Harte
5a97c09238 Flip internal presumption on the BRK flag. 2022-06-23 11:23:00 -04:00
Thomas Harte
3112376943 Don't include DBR in direct indexed indirect. 2022-06-23 11:03:37 -04:00
Thomas Harte
ecfd17a259 Report a 1 in the stack pointer high byte when in emulation mode. 
It has one internally, it just wasn't previously exposed via this method.
 2022-06-22 15:55:34 -04:00
Thomas Harte
a72dd96dc6 Page boundary crossing is free outside of emulation mode. 2022-06-22 15:31:30 -04:00
Thomas Harte
944e5ebbfa Take another run at IO addresses. 2022-06-22 15:28:11 -04:00
Thomas Harte
76767110b7 Fix overflow for 8-bit calculations; essentially a revert for ADC. 2022-06-22 15:18:47 -04:00
Thomas Harte
7dcfa9eb65 65816: improve decimal calculations, posted IO addresses, read/write during redundant read-modify-write cycle. 2022-06-21 14:33:06 -04:00
Thomas Harte
ec98736bd7 Ensure IO cycles don't produce an address of (PC+1). 2022-06-21 11:41:05 -04:00
Thomas Harte
586ef4810b Add restart_operation_fetch, to aid with testing. 2022-06-18 16:25:57 -04:00
Thomas Harte
a0bc332fe6 Taking a second parse, prefer non-lookup-table solutions. 2022-06-17 11:55:38 -04:00
Thomas Harte
b0ab5b7b62 Simplify Microcycle helpers. 2022-06-16 21:34:24 -04:00
Thomas Harte
dc8103ea82 Fix return address following a STOP. 2022-06-16 15:10:35 -04:00
Thomas Harte
7d00b50e13 Fix upper/lower_data_select; simplify value8_low. 2022-06-15 21:11:31 -04:00
Thomas Harte
12b058867e Correct very minor typo. 2022-06-15 19:34:54 -04:00
Thomas Harte
8ff09a1923 Fix value8_high. 2022-06-15 19:34:49 -04:00
Thomas Harte
62fa0991ed Disallow copying, add some basic asserts. 2022-06-15 19:34:43 -04:00
Thomas Harte
24823233ff Add spurious interrupt support. 2022-06-15 11:00:27 -04:00
Thomas Harte
bd056973ba Don't allow STOP state to block execution. 2022-06-15 10:56:45 -04:00
Thomas Harte
5420fd5aa3 Fix: new status word is still in prefetch. 2022-06-15 10:54:34 -04:00
Thomas Harte
93615f6647 Apply new status before entering STOP loop. 2022-06-15 10:50:03 -04:00
Thomas Harte
0ace9634ce Fix MOVEA. 2022-06-14 21:56:48 -04:00