Thomas Harte
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a402e30edf
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Combine all per-bank information into a single struct.
(while fixing the indexing type)
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2024-01-17 09:44:07 -05:00 |
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Thomas Harte
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9ea71c97db
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Consolidate on std::array.
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2024-01-16 14:28:15 -05:00 |
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Thomas Harte
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a047c6493a
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Eliminate joystick macros.
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2024-01-16 14:26:55 -05:00 |
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Thomas Harte
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3ab6953246
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Avoid use of raw pointers in machine creation.
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2024-01-12 22:03:19 -05:00 |
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Thomas Harte
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8578dfbf22
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Eliminate various other errant spaces.
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2023-05-16 16:40:09 -04:00 |
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Thomas Harte
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a1a7c0e253
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Apply maybe_unused judiciously.
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2023-05-15 10:17:04 -04:00 |
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Thomas Harte
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28c79b2885
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Eliminate redundant [space][tab] pairs.
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2023-05-12 14:14:45 -04:00 |
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Thomas Harte
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10cd2a36cf
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Avoid type-in-function-name, Z80 edition.
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2023-05-10 18:42:19 -05:00 |
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Thomas Harte
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8f2e94a1d8
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Switch name back to emphasise _async_.
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2022-07-16 14:41:04 -04:00 |
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Thomas Harte
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bf03bda314
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Generalise AsyncTaskQueue, DeferringAsyncTaskQueue and AsyncUpdater into a single template.
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2022-07-14 16:39:26 -04:00 |
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Thomas Harte
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6dabdaca45
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Switch to int; attempt to do a better job of initial audio filling.
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2022-07-09 13:33:46 -04:00 |
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Thomas Harte
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b097b1296b
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Adopt granular flushing widely.
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2022-07-08 16:04:32 -04:00 |
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Thomas Harte
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f5d3d6bcea
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Splits the lowpass filter into push and pull variants.
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2021-11-21 15:37:29 -05:00 |
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Thomas Harte
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f4db4c3a73
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Implements ROM::Request::validate.
It now also validates ROM sizes, so can no longer take a const Map.
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2021-06-04 18:54:50 -04:00 |
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Thomas Harte
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a30eeaab6a
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Starts to introduce a new grammar for ROM requests.
They can be optional, and chained together in AND or OR combinations. A central catalogue knows the definitions of all ROMs.
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2021-06-03 21:55:59 -04:00 |
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Thomas Harte
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22c31e4f55
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Tightens automatic tape control timing.
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2021-05-08 17:34:59 -04:00 |
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Thomas Harte
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052e284c33
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Add overt fallthrough.
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2021-05-03 22:17:43 -04:00 |
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Thomas Harte
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b6554c8255
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Adds joystick support.
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2021-04-28 20:19:01 -04:00 |
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Thomas Harte
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b7a62e0121
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Adds SZX support.
Tweaking exposed Spectrum state object as relevant.
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2021-04-26 20:47:28 -04:00 |
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Thomas Harte
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3348167c46
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Ensures AY registers are conveyed.
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2021-04-26 17:39:11 -04:00 |
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Thomas Harte
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700c505974
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Ensures the ZX Spectrum properly reports its display type.
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2021-04-25 21:16:22 -04:00 |
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Thomas Harte
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5e08d7db39
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Carries through paging state; avoids file rereads.
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2021-04-25 20:46:49 -04:00 |
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Thomas Harte
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205518ba75
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Switch to more efficient copy.
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2021-04-25 16:51:07 -04:00 |
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Thomas Harte
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0ef2806970
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Adds just enough to ensure that border state gets through.
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2021-04-25 14:16:35 -04:00 |
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Thomas Harte
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fd271d920b
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Adds capture and forwarding of border colour.
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2021-04-25 14:00:12 -04:00 |
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Thomas Harte
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2bbf8bc9fa
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Ensures 16/48kb snapshots are properly copied into place.
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2021-04-25 13:27:11 -04:00 |
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Thomas Harte
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a5098a60ec
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Attempts to get in-SNA software to start.
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2021-04-25 13:18:26 -04:00 |
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Thomas Harte
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0ebd900e40
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Baby steps: apply Z80 state.
As far as it currently is. Since SNA is leaving the PC at the default of 0x0000, this currently has no visible effect.
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2021-04-25 13:03:24 -04:00 |
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Thomas Harte
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cc78bfb229
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Forwards most of the Z80 state.
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2021-04-25 13:00:43 -04:00 |
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Thomas Harte
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9baa861742
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Simplifies timing calculation expression.
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2021-04-21 19:18:07 -04:00 |
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Thomas Harte
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9293bcbc88
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Exclude the ROM from contention on 48kb and 128kb models.
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2021-04-21 18:49:18 -04:00 |
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Thomas Harte
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7bac18bd65
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Address bus load time is not + 1/2.
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2021-04-18 18:41:24 -04:00 |
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Thomas Harte
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80d4846a27
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Respond with 0xff during an interrupt acknowledge.
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2021-04-18 11:56:00 -04:00 |
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Thomas Harte
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7fdb1d848b
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Corrects Spectrum 128kb partial decoding.
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2021-04-16 21:54:52 -04:00 |
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Thomas Harte
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ef636da866
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Attempts 48/128kb floating bus behaviour.
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2021-04-15 21:19:21 -04:00 |
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Thomas Harte
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349b9ce502
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Don't post contended accesses other than on the +2a/+3.
Those machines have an actual latch for this stuff, the others don't.
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2021-04-15 21:13:06 -04:00 |
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Thomas Harte
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71cf63bd35
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Corrects internal cycle contention.
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2021-04-15 19:17:11 -04:00 |
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Thomas Harte
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d1bb3aada4
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Attempts to complete the in-machine application of contention.
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2021-04-15 18:57:34 -04:00 |
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Thomas Harte
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b4214c6e08
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Blocks off the AY from inputs in 48kb mode.
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2021-04-15 18:04:16 -04:00 |
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Thomas Harte
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f5c7746493
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Extends fast loading support to the just-introduced models.
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2021-04-15 17:31:42 -04:00 |
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Thomas Harte
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f10ec80153
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Gets started on different video timings.
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2021-04-14 22:23:27 -04:00 |
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Thomas Harte
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0af405aa46
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Starts working in the 48kb and 128kb Spectrums.
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2021-04-14 21:37:10 -04:00 |
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Thomas Harte
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dd28246f9f
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Better indicate interrupt timing.
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2021-04-06 12:06:13 -04:00 |
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Thomas Harte
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fd88071c0a
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Remove further detritus.
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2021-04-05 17:21:26 -04:00 |
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Thomas Harte
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90c3d6a1e8
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Attempts a later interception of tape loading.
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2021-04-04 22:39:30 -04:00 |
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Thomas Harte
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f26bf4b9e4
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Splitting here isn't achieving anything.
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2021-04-04 19:52:38 -04:00 |
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Thomas Harte
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5a66956221
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Merge branch 'master' into SpeccyTiming
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2021-04-04 19:12:37 -04:00 |
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Thomas Harte
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d77ddaf4fa
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Switches the Electron to JustInTimeActor video.
Also reorders template parameters; I think that specifying a different time base is likely to be more common than using a divider.
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2021-04-04 17:33:49 -04:00 |
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Thomas Harte
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afb4e6d37d
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Merge branch 'master' into JITSleeper
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2021-04-04 15:37:19 -04:00 |
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Thomas Harte
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14663bd06b
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I think 3 is what I'm aiming for here.
But this probably isn't correct for IO cycles.
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2021-04-02 07:36:57 -04:00 |
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