1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-23 03:32:32 +00:00
Commit Graph

77 Commits

Author SHA1 Message Date
Thomas Harte
73ce67bee8 Added some documentation of the intention here. 2016-08-19 11:04:59 -04:00
Thomas Harte
4edd1214f1 This has now successfully loaded its first PRG-as-a-tape. 2016-08-19 10:58:42 -04:00
Thomas Harte
2935848f35 Adopted header/header/data/data pattern. But still not complete joy. 2016-08-17 08:03:34 -04:00
Thomas Harte
e5523dbbed This gets through loading the first(/only?) copy. I tried repeating it with a bit-flipped header, now I'm trying repeating the header with a different file type. More documentation searching to do, I guess. 2016-08-16 22:17:08 -04:00
Thomas Harte
1bca9aa2bb Fixed parity: now calculated from the actual byte and works the other way around. The Vic now believes it is loading the actual program. So I guess bytes, headers and the lead-in is working. 2016-08-16 21:41:09 -04:00
Thomas Harte
dfe9fb83ef This proves that bytes are being deposited properly. For the first 36 anyway, and with no announcement. 2016-08-16 21:09:50 -04:00
Thomas Harte
12f8aff65b Lengths I'd taken seem to have been for dipoles, not single poles. So I just doubled the clock rate. Also I was producing each dipole as high then low, when they should probably be low then high. The Vic now at least recognises that something is happening on the tape. 2016-08-16 19:46:53 -04:00
Thomas Harte
3a23d5d8cf Adjusted the check digit. 2016-08-15 22:44:36 -04:00
Thomas Harte
dbe47f3f45 I've obviously misunderstood something as, as far as I'm concerned, this should at least get me a 'LOADING'. 2016-08-15 22:40:05 -04:00
Thomas Harte
7994148f55 I'm starting to make a little headway, I think: this performs lead-ins and countdowns, though with no actual data or anything as helpful as that. 2016-08-15 22:10:53 -04:00
Thomas Harte
7e2b4554ea This likely forms the Commodore dipoles correctly. It just stays stuck in leader tone forever is all. 2016-08-15 20:08:50 -04:00
Thomas Harte
38aec44d85 Made sufficient changes for the Vic itself to believe it can recast a PRG as a tape and insert it that way. So now the ball is in the court of: how the heck are Commodore tapes encoded? 2016-08-15 19:44:41 -04:00
Thomas Harte
3aa40212f3 Fixed minor documentation error; admitted that this class didn't invent the idea of a pulse. 2016-08-15 19:37:21 -04:00
Thomas Harte
9d76cd9b60 Removed dead instance storage. 2016-08-04 21:41:12 -04:00
Thomas Harte
3e90b85ff8 Made an attempt to insert proper conversions to/from rotational speed. The Time class is now really turning into a full-on quotient. Might need refactoring. 2016-08-04 21:36:39 -04:00
Thomas Harte
e57ab1025d Fixed location calculation, up to a point. 2016-08-03 22:33:00 -04:00
Thomas Harte
9af9b28baf Made very first attempt at closing the loop on this. But it's time for work. 2016-08-03 08:16:23 -04:00
Thomas Harte
e15241dc3c Added ability to query how long since the new interval was set to the timed event loop. Discovered that LCM will returning the net effect of the common factors only. Otherwise continued iterating towards time preservation. 2016-08-03 07:49:00 -04:00
Thomas Harte
a3a3486f54 Okay, it's becoming more apparent where the (very mild) complexity will be here. But started moving towards retaining rotation between tracks. 2016-08-03 07:33:26 -04:00
Thomas Harte
21f1fa37a4 Fixed Time addition, added accumulation of distance into track into the disk drive, added a short circuit for LCM. 2016-08-03 07:26:05 -04:00
Thomas Harte
30f8b6baa4 Made an attempt to add the necessary extension to Track, with a concrete implementation in PCMTrack, to support time-based seeking, the intended mechanism for not magically spinning the disk back to the index hole upon every head step. 2016-08-03 06:59:45 -04:00
Thomas Harte
d832e5e10d Reduced 1540 PLL to running at 4Mhz. Which is possibly correct (?) Made minor change to avoid divide if possible. 2016-08-02 21:28:50 -04:00
Thomas Harte
bc10b3ee9a It appears the problem is as simple as sectors being counted from zero. 2016-08-01 10:08:38 -04:00
Thomas Harte
f5e4ea3351 Some minor tidying, lots more of the caveman stuff as I try to determine what I'm doing wrong. 2016-08-01 09:43:08 -04:00
Thomas Harte
a00f9adba3 Made a first attempt at D64 support. Made an error somewhere but this should be 90% of it. 2016-08-01 08:41:16 -04:00
Thomas Harte
58297f1baf Performed the basic metadata and routing for opening D64 files. Realised that I wasn't actually necessarily catching exceptions properly for all file opens, and fixed. 2016-08-01 07:09:15 -04:00
Thomas Harte
ee2a7c9415 Added slightly to exposition, to match other formats. 2016-08-01 06:54:57 -04:00
Thomas Harte
2799a87218 Reduced possibility of overflow on LCM, improved commenting widely, removed one stale piece of G64 bootstrapping caveman stuff. 2016-08-01 06:04:55 -04:00
Thomas Harte
198fbbedc7 Reeled back all appropriate pieces of caveman debugging. 2016-07-31 13:42:34 -04:00
Thomas Harte
2332f72875 Formalised clock-rate multiplication within disk drives, discovered that the stepper didn't have ideal behaviour for my timed event loop and hence nailed down the semantics a ilttle more.
(obiter: the 1540 now appears to discern the correct sequence of bits. Framing is off in my test printfs but that's neither here nor there).
2016-07-31 13:32:30 -04:00
Thomas Harte
6ee784a893 Increased logging; discovered I was packing events together too closely. Now getting some zeros. 2016-07-30 04:30:55 -04:00
Thomas Harte
fead524eb5 Attempted to give the PLL a litte extra leeway, and fixed PCMTrack length test. 2016-07-29 18:52:50 -04:00
Thomas Harte
8f62211f5e Wired up the 1540 as a PLL delegate. Which prima facie means it should start receiving a bit stream. Except that I clearly have something in the timing way off — either my flux transitions are far too short or I need to significantly increase the clock rate on the PLL. 2016-07-29 12:08:18 -04:00
Thomas Harte
89a1881fef Started turning the 1540 into an actual disk drive. 2016-07-29 11:03:09 -04:00
Thomas Harte
6532b3a8c8 Filled in a calculation of clocks per bit that'll do. 2016-07-29 07:51:07 -04:00
Thomas Harte
f984de42a3 Took some small steps towards having a disk drive that at least can select a track and pump relevant events into a PLL. 2016-07-29 07:31:02 -04:00
Thomas Harte
0e581c7607 Factored out the stuff of running a timed event loop from the TapePlayer. 2016-07-29 07:15:46 -04:00
Thomas Harte
e55db0cfe8 Made an attempt to eliminate creeping tape processing accuracy misses, which implied factoring out the GCM and LCD functions, which I then felt didn't really amount to signal processing. 2016-07-29 05:19:01 -04:00
Thomas Harte
5c1614ce7b Attempted to simplify, very slightly. 2016-07-28 14:35:39 -04:00
Thomas Harte
015cea494d Switched to a much-more straightforward PLL. I think I'm just fiddling now rather than moving forwards. Probably time to move on? 2016-07-28 11:32:14 -04:00
Thomas Harte
e061e849d4 Had a second bash at the PLL. Probably I should read some of the literature. 2016-07-27 16:24:24 -04:00
Thomas Harte
63f39608a6 Added just enough to get back to a working build. 2016-07-15 20:35:19 -04:00
Thomas Harte
165dbd9651 Started fleshing this out a bit. Hopefully. 2016-07-15 08:28:34 -04:00
Thomas Harte
0aa90b943b Switched to specifying bit length as a quotient for the purposes of a PCMSegment and verified that I had the logic for picking a Commodore time zone backwards: bigger numbers are faster, not slower.
Started sketching out a DiskDrive class.
2016-07-15 06:51:11 -04:00
Thomas Harte
6afd619791 Eliminated floating point arithmetic. 2016-07-14 19:47:00 -04:00
Thomas Harte
6b4fec37ff Moved down to a single divide. 2016-07-14 19:45:08 -04:00
Thomas Harte
481475a0f4 Switched to a full-on linear regression. Which causes the current tests to pass. 2016-07-14 19:42:01 -04:00
Thomas Harte
6d6b26b99f Actually made things worse. 2016-07-14 07:32:27 -04:00
Thomas Harte
d8d3464c56 Made a quick-hack attempt at PLL synchronisation. Which doesn't work. 2016-07-14 07:31:23 -04:00
Thomas Harte
d1fe07f14d Added test of perfect DPLL input timing. 2016-07-12 21:42:23 -04:00