Thomas Harte
8564945713
Corrects vector nomination for unrecognised opcodes.
2019-04-29 17:10:33 -04:00
Thomas Harte
7bd7f3fb73
Sign-extends (xxx).w addresses.
2019-04-29 16:55:43 -04:00
Thomas Harte
c466b6f9e7
Factors out the [unit testing] stuff of being a trace-checking 68000 bus handler.
2019-04-29 16:11:01 -04:00
Thomas Harte
d9071ee9f1
Starts sketching out the asynchronous bus.
2019-04-29 13:45:53 -04:00
Thomas Harte
97e118abfa
Corrects accidental exclusion of MOVE.bw (xxx).w, [(xxx).w/(xxx).l].
2019-04-28 23:25:46 -04:00
Thomas Harte
412f091d76
Implements a missing form of BTST.
2019-04-28 23:20:50 -04:00
Thomas Harte
ca1f669e64
Implements MOVEP.
...
371 is now the alleged number of missing opcodes. But I'd dare imagine it's more like three or four.
2019-04-28 22:52:54 -04:00
Thomas Harte
0298b1b3b7
Implements LINK and UNLINK.
...
Also starts excluding opcodes that I can't determine the mapping of from the list of those tested against.
Due to those two things together, the latter incomplete: 627 opcodes outstanding. But only STOP and MOVEP remain on my list of things to implement prior to exceptions.
2019-04-28 17:12:31 -04:00
Thomas Harte
4b1324de77
Takes a run at TRAPV.
...
... to leave 1466 as the unimplemented count.
2019-04-28 15:52:58 -04:00
Thomas Harte
8e8dce9bec
Attempts an implementation of CHK.
...
1467 is now the official count of things to implement, though I'm starting to get suspicious.
2019-04-28 15:47:21 -04:00
Thomas Harte
f4350522bf
Implements NBCD.
...
Now outstanding: 1891.
2019-04-27 21:29:50 -04:00
Thomas Harte
e2abb66a11
Adds missing addressing modes for ADDA and SUBA.
...
... reducing missing opcodes to 1941.
2019-04-27 17:22:26 -04:00
Thomas Harte
ab5fcab9bf
Attempts an implementation of ADDX and SUBX.
...
Leaving 2005 non-[A/F]-line instructions.
2019-04-27 16:57:47 -04:00
Thomas Harte
e75b386f7d
Attempts DIVU and DIVS.
...
Reportedly leaving 10965 operations now unimplemented.
2019-04-26 22:22:35 -04:00
Thomas Harte
796203859f
Implements PEA.
...
This decreases the unimplemented count by 28 from 11841 to 11813.
2019-04-26 13:49:59 -04:00
Thomas Harte
a3b6d2d16e
Corrects test and resolves all instances of opcodes that are valid but shouldn't be.
...
The converse case will require implementation of the remaining instructions.
2019-04-25 22:54:58 -04:00
Thomas Harte
3983f8303f
Introduces failing test of 68000 opcode coverage.
2019-04-25 22:06:05 -04:00
Thomas Harte
dab9bb6575
Implements EXT.
2019-04-25 18:22:19 -04:00
Thomas Harte
c132bda01c
Implements MOVE from SR.
2019-04-25 14:39:32 -04:00
Thomas Harte
4e25bcfcdc
Corrects decoding of AND/OR x, Dn.
2019-04-25 14:19:13 -04:00
Thomas Harte
ea463549c7
Corrects overflow flag for LSL and LSR.
2019-04-25 13:59:10 -04:00
Thomas Harte
723acb31b3
Corrects various flag issues with ADD, SUB and NEG.
2019-04-25 13:53:23 -04:00
Thomas Harte
5725db9234
Corrects calculated-address TAS.
2019-04-25 12:42:05 -04:00
Thomas Harte
8557e563bc
Takes a run at TAS, clarifying bus cycles.
2019-04-25 12:19:40 -04:00
Thomas Harte
d2491633ce
Ensures MOVEM to M .w correctly updates A7.
2019-04-24 23:21:15 -04:00
Thomas Harte
002796e5f5
Takes a run at BSET and BCHG.
2019-04-24 23:01:32 -04:00
Thomas Harte
fa0accf251
Attempts to correct flags for ASL, ASR, LSL, LSR.
2019-04-24 21:04:47 -04:00
Thomas Harte
dcb8176d90
Corrects potential failure properly to set stack pointer state.
2019-04-24 17:58:27 -04:00
Thomas Harte
be32b1a198
Fixes JSR (An) return address [again].
2019-04-24 17:50:38 -04:00
Thomas Harte
582e4acc11
Implements ANDI/ORI/EOR to SR/CCR.
2019-04-24 17:38:59 -04:00
Thomas Harte
10f75acf71
Causes EXG to function.
2019-04-24 16:32:16 -04:00
Thomas Harte
b9933f512f
Fixed: the word/long-word bit works the other way around.
2019-04-24 16:30:15 -04:00
Thomas Harte
75a7f7ab22
Inserts missing program fetch for CMPI.bw #, (d8/16...).
2019-04-24 14:45:24 -04:00
Thomas Harte
e214584c76
SWAP should clear overflow and carry.
2019-04-24 13:19:56 -04:00
Thomas Harte
0bb6b498ce
Simplifies and fixes post-inc MOVE behaviour.
2019-04-24 13:14:25 -04:00
Thomas Harte
958d44a20d
Causes SWAP actually to perform.
2019-04-24 13:06:12 -04:00
Thomas Harte
bb9424d944
Corrects byte increment/decrement actions for A7.
2019-04-24 13:01:08 -04:00
Thomas Harte
11bf706aa2
Attempts to fix LT and LTE conditions.
2019-04-24 10:07:17 -04:00
Thomas Harte
033b8e6b36
ADD/SUBQ #, An shouldn't set flags.
...
Also, temporarily at least, adds a new means for observing CPU behaviour.
2019-04-24 09:59:54 -04:00
Thomas Harte
7c3ea7b2ea
Resolves additional byte accesses being signalled as word.
2019-04-23 21:23:20 -04:00
Thomas Harte
a08043ae88
Ensures that MOVE.b #, (xxx).l writes only a byte.
...
Also rearranges some of the temporary logging functionality.
2019-04-23 19:01:58 -04:00
Thomas Harte
7c132a3ed5
Ensures 16-bit values of Xn for (d8, An, Xn) are sign extended.
2019-04-22 22:13:02 -04:00
Thomas Harte
20e774be1e
Corrects return address of JSR (An).
2019-04-22 21:11:49 -04:00
Thomas Harte
6d6046757d
Fixes predecrementing MOVEM to leave the proper address in the relevant register.
2019-04-22 15:41:09 -04:00
Thomas Harte
55073b0a52
Corrects a bunch of MOVEs to (d8/16, PC/An, [Xn]).
2019-04-21 22:55:23 -04:00
Thomas Harte
44eb4e51ed
Ensures DBcc properly signals program fetches.
2019-04-21 22:54:20 -04:00
Thomas Harte
3cb042a49d
Corrects the carry and extend flags for various long-word operations.
2019-04-21 22:08:18 -04:00
Thomas Harte
b78ea7d24c
Further simplifies CMPA.
2019-04-20 21:23:36 -04:00
Thomas Harte
c66728dce2
Corrects decoding of CMPA.
2019-04-20 21:21:33 -04:00
Thomas Harte
0be9a0cb88
Corrects Scc (and other conditionals) for complex addressing modes.
2019-04-20 18:35:19 -04:00
Thomas Harte
a90f12dab7
Corrects return address for TRAP.
2019-04-20 15:49:32 -04:00
Thomas Harte
ef33b004f9
Corrects word access order of MOVEM.l.
2019-04-20 15:13:12 -04:00
Thomas Harte
2cac4b0d74
Corrects EA usage for ADDA and SUBA.
2019-04-19 23:02:41 -04:00
Thomas Harte
a49f516265
Corrects direction of MOVE [to/from] USP.
2019-04-19 22:41:06 -04:00
Thomas Harte
2d97fc1f59
Beefs up documentation and developer support.
2019-04-19 13:29:35 -04:00
Thomas Harte
9ef7743205
Attempts to unify type decoding a little further.
2019-04-19 13:29:20 -04:00
Thomas Harte
ee7ae11e90
Implements EXG and SWAP.
2019-04-19 11:27:43 -04:00
Thomas Harte
f67d7f1db5
Adds the final (!) set of missing MOVEs.
2019-04-19 11:11:38 -04:00
Thomas Harte
99981751a2
Adds the official NOP.
...
Which is a freebie.
2019-04-18 23:46:01 -04:00
Thomas Harte
ffdf02c5df
Adds MOVE XXX.lw, -(An)
2019-04-18 23:40:54 -04:00
Thomas Harte
27c7d00a05
Commutes final missing MOVEs to TODOs.
2019-04-18 23:35:32 -04:00
Thomas Harte
64c4137e5b
Begins a cleanup procedure on MOVE.
2019-04-18 23:25:19 -04:00
Thomas Harte
8c26d0c6e6
Makes an attempt at RTE and RTR.
2019-04-18 20:50:58 -04:00
Thomas Harte
81dcfd9f85
Implements AND, OR and EOR.
...
As well as introducing a little more nuance to the double-decoding test.
2019-04-18 16:34:48 -04:00
Thomas Harte
9334557fbf
Added important TODO.
2019-04-17 23:12:32 -04:00
Thomas Harte
b09de8efce
Attempts to fill in the rest of MOVE x, -(An).
2019-04-17 23:05:16 -04:00
Thomas Harte
5a50eb56dd
Marginally increases coverage of MOVE x, -(An).
2019-04-17 22:30:07 -04:00
Thomas Harte
e49b257e94
Takes a run at TRAP.
2019-04-17 22:21:56 -04:00
Thomas Harte
b8a0f4e831
Implements MOVE to/from USP.
2019-04-17 16:58:59 -04:00
Thomas Harte
29f8dcfb40
Fixes a bunch of (d16, An)-type MOVEs and implements MOVE (XXX).wl, (d16,An)/etc.
2019-04-17 16:13:35 -04:00
Thomas Harte
0c05983617
Shortens impact of MULU on the instruction stream to correct parsing.
...
I need to look into this.
2019-04-17 15:15:48 -04:00
Thomas Harte
0bd653708c
Corrects MOVE.bw Dn, (An)[+].
2019-04-17 14:31:20 -04:00
Thomas Harte
41d800cb63
Fixes ADD/SUB Dn,x to use the proper destination value.
2019-04-17 10:23:47 -04:00
Thomas Harte
cadc0bd509
Mental delusion lifted: JSR doesn't look enough like BSR.
2019-04-17 10:02:14 -04:00
Thomas Harte
b64da2710a
Corrects a few MOVE #s.
2019-04-17 10:00:14 -04:00
Thomas Harte
82b08d0e3a
Corrects addressing behaviour of nRd[+-].
2019-04-17 08:53:34 -04:00
Thomas Harte
8f77d1831b
Implements MULU and MULS.
2019-04-16 22:16:43 -04:00
Thomas Harte
be722143e1
Completes addressing modes for ADDI/etc/etc.
2019-04-16 21:34:16 -04:00
Thomas Harte
d8d974e2d7
Consolidates JSR and BSR preparation.
2019-04-16 21:29:37 -04:00
Thomas Harte
9b7ca6f271
Implements the basics of EORI, ORI, ANDI, SUBI and ADDI.
...
Also corrects the BSR return address.
2019-04-16 19:50:10 -04:00
Thomas Harte
8ce018dbab
Adds the necessary runtime support for AND, EOR and OR.
2019-04-16 15:17:40 -04:00
Thomas Harte
180062c58c
Finishes fleshing out [ADD/SUB]Q.
2019-04-16 14:28:31 -04:00
Thomas Harte
37656f14d8
Adds basic addressing modes for [ADD/SUB]Q.
2019-04-16 11:19:45 -04:00
Thomas Harte
dec5535e54
Implements (arguably: fixes) BSR.
2019-04-15 23:20:36 -04:00
Thomas Harte
1f0e3b157a
Corrects a couple of JSR and JMP addressing modes.
2019-04-15 22:37:11 -04:00
Thomas Harte
d802e83f49
Fills in further MOVEs.
2019-04-15 22:25:22 -04:00
Thomas Harte
ebcae25762
Adjusts JSR behaviour and further extends MOVE.
2019-04-15 22:02:52 -04:00
Thomas Harte
5330267d16
Implements BCLR.
2019-04-15 18:11:02 -04:00
Thomas Harte
892476973b
Attempts RO{X}[L/R].
2019-04-15 17:31:58 -04:00
Thomas Harte
84f4a25bc9
Completes TST.
2019-04-15 16:28:20 -04:00
Thomas Harte
1460a88bb3
Takes a run at JSR and RTS.
2019-04-15 15:14:38 -04:00
Thomas Harte
d25ab35d58
Finally gets setw usage correct.
2019-04-15 12:41:56 -04:00
Thomas Harte
a223cd90a1
Adds predecrement TSTs, increases QL running time, reduces logging.
2019-04-15 12:36:08 -04:00
Thomas Harte
aef92ba29c
Corrects immediate shift count.
2019-04-15 12:25:45 -04:00
Thomas Harte
328d297490
Implements the first few addressing modes for TST.
2019-04-15 10:03:52 -04:00
Thomas Harte
3d240f3f18
Corrects decoding of DBcc.
2019-04-15 09:49:23 -04:00
Thomas Harte
45f35236a7
Corrects decoding of ADDA and SUBA.
2019-04-15 09:44:06 -04:00
Thomas Harte
fba210f7ce
Corrects MOVE.l Dn, (An)[+].
2019-04-15 09:30:49 -04:00
Thomas Harte
8a09e5fc16
Implements Scc.
2019-04-14 22:39:13 -04:00
Thomas Harte
75d8824e6b
Eliminates implicit type conversion.
2019-04-14 21:02:28 -04:00
