9 Commits

Author	SHA1	Message	Date
Thomas Harte	1c154131f9	Expands size of storage in Cycles/HalfCycles; adjusts widely to compensate.	2019-10-29 22:36:29 -04:00
Thomas Harte	91223b9ec8	Sets default level to high.	2019-10-21 20:18:33 -04:00
Thomas Harte	cf07982a9b	Ensures good serial line and ACIA behaviour. ... Next stop: having the intelligent keyboard react.	2019-10-20 22:10:05 -04:00
Thomas Harte	696af5c3a6	Starts to transfer serial line decoding logic into the line itself.	2019-10-20 20:38:56 -04:00
Thomas Harte	9a8352282d	Mostly but not quite fixes serial work.	2019-10-20 20:38:55 -04:00
Thomas Harte	34075a7674	Attempts to tie an intelligent keyboard to the other end of its serial line.	2019-10-20 20:38:55 -04:00
Thomas Harte	374439693e	Ensures serial lines know their writer's clock rate.	2019-10-20 20:38:55 -04:00
Thomas Harte	4e5b440145	Attempts mostly to implement 6850 output.	2019-10-20 20:38:55 -04:00
Thomas Harte	2bd7be13b5	Decodes the 6850 control register, and starts working on standardised serial ports.	2019-10-20 20:38:55 -04:00