12 Commits

Author	SHA1	Message	Date
Thomas Harte	ef01471e17	Ensures the DMA controller remains clocked.	2021-04-20 22:34:13 -04:00
Thomas Harte	31c6faf3c8	Adds a bunch of consts.	2020-05-09 21:23:52 -04:00
Thomas Harte	05bcd73f82	Attempts to pull drive ownership into DiskController. ... For the sake of being more intelligent as to drive clocking, hopefully. And, eventually, to support multiple drive selection.	2020-02-11 21:59:13 -05:00
Thomas Harte	c1bae49a92	Standardises on read and write for bus accesses. ... Logic being: name these things for the bus action they model, not the effect they have.	2020-01-05 13:40:02 -05:00
Thomas Harte	a8ba3607b7	Adds (and disables) a minor additional piece of logging.	2019-12-24 21:43:39 -05:00
Thomas Harte	5068328a15	Fixes debugging output.	2019-12-24 19:15:58 -05:00
Thomas Harte	b2bed82da6	Switches to standard logging.	2019-12-23 22:00:40 -05:00
Thomas Harte	0dae608da5	Embraces std::make_[unique/shared] in place of .reset(new .	2019-12-23 21:31:46 -05:00
Thomas Harte	47508d50a7	Wires through a composite video option for the ST. ... Which is great and all, except that I've not yet inserted a colour burst. So it's monochrome.	2019-12-20 20:49:14 -05:00
Thomas Harte	3d83f5ab49	Ensures a proper size handoff and implements a ripple feature I happened to find a forum post about.	2019-12-19 22:58:07 -05:00
Thomas Harte	0007dc23b3	Eliminates bit 0 of the DMA address.	2019-12-19 22:44:21 -05:00
Thomas Harte	77ef7dc8fc	Shuffles ST and 2600 into a common parent.	2019-11-09 15:31:41 -05:00