Thomas Harte
da082673d7
Drives now have a finite number of heads.
...
The Amstrad volunteers itself to be single sided. Everything else stays as it was.
2017-09-15 21:18:36 -04:00
Thomas Harte
fb9fd26af7
Updates the 1540 for the slightly-more modern world of decoupled drives and disks (!).
2017-09-11 22:08:10 -04:00
Thomas Harte
96bf133924
Withdraws requirement for DiskController users to specify a PLL multiplier or to provide rotation speed.
...
In the latter case because it's no longer of any interest to the controller, and in the former because I'd rather it be picked automatically.
2017-09-10 22:56:05 -04:00
Thomas Harte
0622187ddf
Strips Controller of all capabilities now housed on the Drive.
2017-09-10 19:23:23 -04:00
Thomas Harte
90c7056d12
Started devolving timed event loop logic down to the drives, moving them closer to modelling real life.
2017-09-10 14:43:20 -04:00
Thomas Harte
3b12fca417
Corrects non-recurring-pattern adaptation bug: the 'SerialPortVIA' should keep a reference to its VIA, not a copy of it.
2017-09-05 21:19:56 -04:00
Thomas Harte
6547102511
Attempts better to hide C1540 implementation details from the reader.
...
In this case not from the compiler, as it's desireable to keep `run_for` as a non-virtual call, and therefore everything else comes alone for the ride.
2017-09-04 20:58:00 -04:00
Thomas Harte
24b3faa427
Deconstitutes the 6522 into component parts, templated and non-templated.
...
Adjusts the Oric, Vic-20 and C-1540 accordingly, albeit with the quickest possible solutions.
2017-09-04 14:26:04 -04:00
Thomas Harte
ee71be0e7e
Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable.
2017-08-21 21:56:42 -04:00
Thomas Harte
42b5b66305
Remove the 6502's use of runtime polymorphism in favour of ordinary templating.
2017-08-16 11:56:52 -04:00
Thomas Harte
4abd62e62b
Standardises on const [Half]Cycles as the thing called and returned, rather than const [Half]Cycles & as it's explicitly defined to be only one int in size, so using a reference is overly weighty.
2017-07-27 22:05:29 -04:00
Thomas Harte
279c369a1f
Switched to Cycles as the result from the 6502 perform_bus_operation, helping slightly to clarify what you're intended to return and reducing type jumping within the 6502 implementation.
2017-07-25 22:21:09 -04:00
Thomas Harte
9435c1e12a
The 1540 is now a ClockReceiver.
2017-07-24 22:32:41 -04:00
Thomas Harte
efdac2ce8c
The 6522 is now a ClockReceiver.
2017-07-24 22:29:09 -04:00
Thomas Harte
8a2bdb8d22
Converted the TimedEventLoop and the things that sit atop it into ClockReceivers.
2017-07-24 21:19:05 -04:00
Thomas Harte
83628b285b
Experimentally turned the 6502 into a clock receiver. No problem encountered.
2017-07-22 21:52:21 -04:00
Thomas Harte
f931cd582d
Switched to use of std::vector in those few remaining places where I was still using a unique_ptr to a native type and newing for myself. So, some of my earliest bits of code.
2017-07-16 13:54:07 -04:00
Thomas Harte
0808e9b6fb
Pulled the 6502 into a CPU namespace, making it an instance of something that has micro-opcodes and schedules them, and factoring out the formulation of a register pair.
2017-05-14 22:08:15 -04:00
Thomas Harte
e01f3f06c8
Completed curly bracket movement.
2017-03-26 14:34:47 -04:00
Thomas Harte
063a62372f
The Commodore serial bus and C1540 are now postfix underscorers.
2016-12-03 13:14:03 -05:00
Thomas Harte
4fab794747
Added a direct-to-two-cycles emulation path for 6522 owners.
2016-10-27 21:13:25 -04:00
Thomas Harte
6292ac5b26
Yet more .hpp clean(s)ing.
2016-10-20 21:15:21 -04:00
Thomas Harte
572d5587d9
Made a first stab at enabling multi-disk machines and thereby obeying (some of) the Plus 3's status register.
2016-09-25 21:24:16 -04:00
Thomas Harte
9bbcbd1001
Renamed class, intending to turn a Disk::Drive into literally just that, and have a thing with a PLL that consumes events be a Controller.
2016-09-25 20:05:56 -04:00
Thomas Harte
56c0d70c1f
Gave disks their own namespace.
2016-08-27 17:15:09 -04:00
Thomas Harte
d832e5e10d
Reduced 1540 PLL to running at 4Mhz. Which is possibly correct (?) Made minor change to avoid divide if possible.
2016-08-02 21:28:50 -04:00
Thomas Harte
bc10b3ee9a
It appears the problem is as simple as sectors being counted from zero.
2016-08-01 10:08:38 -04:00
Thomas Harte
f5e4ea3351
Some minor tidying, lots more of the caveman stuff as I try to determine what I'm doing wrong.
2016-08-01 09:43:08 -04:00
Thomas Harte
18744cd98b
Slightly updated comments, switched to 1540 ROM so as very slightly to improve loading time.
2016-08-01 04:37:30 -04:00
Thomas Harte
b43a7381ae
Fixed framing and first-byte-after-sync signalling. Hacked together as parts of it are, loading now appears to work!
2016-08-01 04:25:11 -04:00
Thomas Harte
41893b5ef6
Put in the absolute minimum logic for drive motor emulation. Drive appears to be attempting head steps.
2016-07-31 19:38:51 -04:00
Thomas Harte
740ea0b7e2
Added overflow-flag setting logic and ensured disk ROM gets through regardless of ROM/disk installation order.
2016-07-31 19:33:18 -04:00
Thomas Harte
0945049cd3
Made attempt to connect sync detect and then apply appropriate windowing, posting bytes to the appropriate place.
2016-07-31 18:29:44 -04:00
Thomas Harte
198fbbedc7
Reeled back all appropriate pieces of caveman debugging.
2016-07-31 13:42:34 -04:00
Thomas Harte
2332f72875
Formalised clock-rate multiplication within disk drives, discovered that the stepper didn't have ideal behaviour for my timed event loop and hence nailed down the semantics a ilttle more.
...
(obiter: the 1540 now appears to discern the correct sequence of bits. Framing is off in my test printfs but that's neither here nor there).
2016-07-31 13:32:30 -04:00
Thomas Harte
8f62211f5e
Wired up the 1540 as a PLL delegate. Which prima facie means it should start receiving a bit stream. Except that I clearly have something in the timing way off — either my flux transitions are far too short or I need to significantly increase the clock rate on the PLL.
2016-07-29 12:08:18 -04:00
Thomas Harte
89a1881fef
Started turning the 1540 into an actual disk drive.
2016-07-29 11:03:09 -04:00
Thomas Harte
ada2f073e0
Completed handing of the disk all the way to the 1540.
2016-07-10 16:24:46 -04:00
Thomas Harte
824d9ea92b
Added further comments.
2016-07-10 08:01:16 -04:00
Thomas Harte
d8334edf4a
Started trying to clean up, including commuting the C1540 source file name to match its class name but mainly by adding documentation.
2016-07-10 07:46:20 -04:00
Thomas Harte
c0ab45a73d
Disabled a bunch of the caveman debug logging.
2016-07-09 22:29:11 -04:00
Thomas Harte
f589d639db
Okay, so it seems that sync also works the other way around.
2016-07-09 22:25:44 -04:00
Thomas Harte
693c8b2438
After all that, it seems likely that inputs just aren't inverted for the Vic.
2016-07-09 20:03:38 -04:00
Thomas Harte
656cd211d7
Was transmitting bit levels backwards (probably?); 1540 now acknowledges byte received.
2016-07-09 18:06:49 -04:00
Thomas Harte
7cc4bf3fe7
Hit and hope is getting me nowhere. Time to unit test this thing.
2016-07-09 15:40:25 -04:00
Thomas Harte
8827597363
Messier and messier, but I've at least attempted to implement hardware attention acknowledge.
2016-07-08 19:00:39 -04:00
Thomas Harte
9a08ef61cb
Still fumbling in the margins: made an effort not to imply that the 1540 is forever reading syncs.
2016-07-07 22:13:18 -04:00
Thomas Harte
199c0e27e0
Mostly just random guesses now, to be honest. It's approaching the end of my window for the morning.
2016-07-07 07:16:36 -04:00
Thomas Harte
c9479f923b
The inversion of truth was clearly just a problematic API. Got explicit. LineLevel might need to become more pervasive.
2016-07-07 06:44:13 -04:00
Thomas Harte
dcb86a027a
Okay, so the 1540 doesn't toggle the actual attention line. I don't know what it does yet but this helps.
2016-07-06 22:31:14 -04:00
