Thomas Harte
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ca2dc6b6c4
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Ensured ROMs survive in the new memory model.
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2016-08-15 19:56:01 -04:00 |
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Thomas Harte
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38aec44d85
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Made sufficient changes for the Vic itself to believe it can recast a PRG as a tape and insert it that way. So now the ball is in the court of: how the heck are Commodore tapes encoded?
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2016-08-15 19:44:41 -04:00 |
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Thomas Harte
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547aefb696
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Slightly adjusted PRG strategy, made a note about where next.
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2016-08-14 16:36:42 -04:00 |
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Thomas Harte
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d9016909ed
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Added some wiring for PAL/NTSC mode switching on the Vic, making an attempt to simplify the whole loop of having different clock rates.
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2016-08-14 13:33:20 -04:00 |
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Thomas Harte
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a547b7e1d8
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Took basic steps towards supporting memory expansions.
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2016-08-13 17:21:25 -04:00 |
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Thomas Harte
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142774be37
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Collapsed 6560 template to a more direct loop, albeit with quite a bit still left to fix.
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2016-08-09 21:10:53 -04:00 |
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Thomas Harte
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12bad8f23f
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Turned the 6560 into an ordinary template, similar to the rest of the project, albeit right now with a fairly shonky internal implementation. Fixed a Mac-specific interface sizing issue.
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2016-08-09 20:41:05 -04:00 |
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Thomas Harte
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285a288c80
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Switched to two cycles of options loading, meaning that they get set before files are inserted. Might need some further work?
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2016-08-07 21:48:09 -04:00 |
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Thomas Harte
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be54d8040e
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Made a first stab at having automatic loading be optional. But things are currently arranged such that the machine options are communicated too late to have an effect. So work to do.
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2016-08-06 17:39:27 -04:00 |
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Thomas Harte
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3e65450a54
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Converted the 6560 fully into a template; worked on allowing the typer to run at a much faster rate where hardware has some trigger by which it can request the next key.
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2016-08-06 14:33:24 -04:00 |
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Thomas Harte
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d832e5e10d
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Reduced 1540 PLL to running at 4Mhz. Which is possibly correct (?) Made minor change to avoid divide if possible.
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2016-08-02 21:28:50 -04:00 |
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Thomas Harte
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5d40d70c92
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Fixed 6560 addressing error, added an autotyper for Vic disks (more work potentially needed), fixed semantics for testing whether a 6502 is about to reset.
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2016-08-01 10:32:32 -04:00 |
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Thomas Harte
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bc10b3ee9a
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It appears the problem is as simple as sectors being counted from zero.
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2016-08-01 10:08:38 -04:00 |
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Thomas Harte
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f5e4ea3351
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Some minor tidying, lots more of the caveman stuff as I try to determine what I'm doing wrong.
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2016-08-01 09:43:08 -04:00 |
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Thomas Harte
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18744cd98b
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Slightly updated comments, switched to 1540 ROM so as very slightly to improve loading time.
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2016-08-01 04:37:30 -04:00 |
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Thomas Harte
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b43a7381ae
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Fixed framing and first-byte-after-sync signalling. Hacked together as parts of it are, loading now appears to work!
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2016-08-01 04:25:11 -04:00 |
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Thomas Harte
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41893b5ef6
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Put in the absolute minimum logic for drive motor emulation. Drive appears to be attempting head steps.
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2016-07-31 19:38:51 -04:00 |
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Thomas Harte
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740ea0b7e2
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Added overflow-flag setting logic and ensured disk ROM gets through regardless of ROM/disk installation order.
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2016-07-31 19:33:18 -04:00 |
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Thomas Harte
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0945049cd3
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Made attempt to connect sync detect and then apply appropriate windowing, posting bytes to the appropriate place.
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2016-07-31 18:29:44 -04:00 |
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Thomas Harte
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198fbbedc7
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Reeled back all appropriate pieces of caveman debugging.
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2016-07-31 13:42:34 -04:00 |
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Thomas Harte
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2332f72875
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Formalised clock-rate multiplication within disk drives, discovered that the stepper didn't have ideal behaviour for my timed event loop and hence nailed down the semantics a ilttle more.
(obiter: the 1540 now appears to discern the correct sequence of bits. Framing is off in my test printfs but that's neither here nor there).
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2016-07-31 13:32:30 -04:00 |
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Thomas Harte
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8f62211f5e
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Wired up the 1540 as a PLL delegate. Which prima facie means it should start receiving a bit stream. Except that I clearly have something in the timing way off — either my flux transitions are far too short or I need to significantly increase the clock rate on the PLL.
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2016-07-29 12:08:18 -04:00 |
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Thomas Harte
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89a1881fef
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Started turning the 1540 into an actual disk drive.
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2016-07-29 11:03:09 -04:00 |
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Thomas Harte
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ada2f073e0
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Completed handing of the disk all the way to the 1540.
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2016-07-10 16:24:46 -04:00 |
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Thomas Harte
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6cfc514c2d
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Made the rote changes necessary to attempt to open and to supply a G64 to the Vic.
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2016-07-10 12:57:17 -04:00 |
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Thomas Harte
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4ca6883f7c
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Disabled attachment of a 1540 again, as I probably need to move to opening an actual disk image next.
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2016-07-10 08:03:36 -04:00 |
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Thomas Harte
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824d9ea92b
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Added further comments.
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2016-07-10 08:01:16 -04:00 |
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Thomas Harte
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d8334edf4a
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Started trying to clean up, including commuting the C1540 source file name to match its class name but mainly by adding documentation.
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2016-07-10 07:46:20 -04:00 |
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Thomas Harte
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c0ab45a73d
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Disabled a bunch of the caveman debug logging.
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2016-07-09 22:29:11 -04:00 |
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Thomas Harte
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f589d639db
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Okay, so it seems that sync also works the other way around.
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2016-07-09 22:25:44 -04:00 |
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Thomas Harte
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693c8b2438
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After all that, it seems likely that inputs just aren't inverted for the Vic.
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2016-07-09 20:03:38 -04:00 |
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Thomas Harte
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656cd211d7
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Was transmitting bit levels backwards (probably?); 1540 now acknowledges byte received.
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2016-07-09 18:06:49 -04:00 |
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Thomas Harte
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7cc4bf3fe7
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Hit and hope is getting me nowhere. Time to unit test this thing.
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2016-07-09 15:40:25 -04:00 |
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Thomas Harte
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8827597363
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Messier and messier, but I've at least attempted to implement hardware attention acknowledge.
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2016-07-08 19:00:39 -04:00 |
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Thomas Harte
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9a08ef61cb
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Still fumbling in the margins: made an effort not to imply that the 1540 is forever reading syncs.
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2016-07-07 22:13:18 -04:00 |
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Thomas Harte
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199c0e27e0
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Mostly just random guesses now, to be honest. It's approaching the end of my window for the morning.
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2016-07-07 07:16:36 -04:00 |
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Thomas Harte
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81e6cc34e5
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Per the ROM disassembly, the Vic's VIA outputs are inverted for the benefit of the serial bus.
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2016-07-07 06:57:21 -04:00 |
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Thomas Harte
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c9479f923b
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The inversion of truth was clearly just a problematic API. Got explicit. LineLevel might need to become more pervasive.
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2016-07-07 06:44:13 -04:00 |
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Thomas Harte
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dcb86a027a
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Okay, so the 1540 doesn't toggle the actual attention line. I don't know what it does yet but this helps.
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2016-07-06 22:31:14 -04:00 |
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Thomas Harte
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1baf21827c
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Since the ROM is well disassembled, let's actually try to be a 1541 first.
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2016-07-06 22:17:32 -04:00 |
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Thomas Harte
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4f174786b5
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Fixed potential buffer overrun.
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2016-07-06 21:39:09 -04:00 |
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Thomas Harte
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f64cd8cfcb
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Quick fixes properly to declare the DriveVIA, to ensure its interrupts take effect, and to wire ATN IN to CA1 rather than CB2.
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2016-07-06 20:22:46 -04:00 |
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Thomas Harte
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428fcdb978
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Centralised and improved serial logging.
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2016-07-06 07:46:21 -04:00 |
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Thomas Harte
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8819711bc8
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Threw in the second VIA as a currently clearly incorrect thing.
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2016-07-05 22:22:09 -04:00 |
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Thomas Harte
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93c2bb80a2
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Improved a comment, added independent C[A/B]2 input mode.
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2016-07-05 21:11:51 -04:00 |
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Thomas Harte
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6c4fa4ec5d
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Improved commenting and initial state communication.
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2016-07-05 20:57:31 -04:00 |
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Thomas Harte
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1e6d90de17
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Made an attempt properly to deal with initial bus state.
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2016-07-05 20:52:33 -04:00 |
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Thomas Harte
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c3b7d24293
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It appears that the attention line is also wired to CB2. So the ball is back in the 6522's court.
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2016-07-05 19:19:46 -04:00 |
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Thomas Harte
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11fc43aa04
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Made an attempt to allow the 1540 to talk back to the Vic, and to receive interrupts. Also slightly disambiguated debugging logging.
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2016-07-05 19:12:43 -04:00 |
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Thomas Harte
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d16b79073e
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Further fleshing out: added a serial port for the serial bus.
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2016-07-05 17:27:02 -04:00 |
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