1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-12-11 15:49:38 +00:00
Commit Graph

40 Commits

Author SHA1 Message Date
Thomas Harte
cc9d23f23b Inverted meaning of register_masks, as it's a bit weird that the mask is inverted immediately upon usage. It's a left-over from thinking the unused bits should be 1s; unit tests reveal they should be 0s. Comment updated appropriately. 2017-08-16 09:29:48 -04:00
Thomas Harte
1a831bcf9b Quick fix: supply the port being written to correctly. 2017-08-16 09:15:57 -04:00
Thomas Harte
3947347d88 Introduces active input handling for the AY and uses it in the CPC to give proper, active keyboard input, rather than push-on-select, which was only ever a temporary hack. Also maps a few more keys for the Amstrad. 2017-08-15 22:47:17 -04:00
Thomas Harte
e3d1f4fe1e Subjectively, this might be more correct. It definitely prevents intermediate frequencies. More research required. 2017-08-08 17:58:35 -04:00
Thomas Harte
41a30c147d Adjusted: invalid register selection simply deselects all registers. 2017-08-07 19:51:36 -04:00
Thomas Harte
7fbb455836 Per the CPC test I'm checking, 0s should be returned for non-retained bits, not 1s. 2017-08-07 19:07:12 -04:00
Thomas Harte
745afd217f The port input/output flags are now honoured; reading a port that is set as an output returns the current output value. 2017-08-07 19:01:18 -04:00
Thomas Harte
3ca9c38777 Attempted to move to more accurate bus reading — if control lines are set then all subsequent data inputs should act according to the current control lines; changes to port input should be reflected live upon readings, etc. 2017-08-02 19:45:58 -04:00
Thomas Harte
0267bc237f Added the ability to set a port input, and relaxed bus state testing. I think my on-demand bus reactions here are inappropriate, so more work to do here probably. 2017-08-01 18:04:51 -04:00
Thomas Harte
e6854ff8db Corrected typo: the input to an AY is BDIR, not BCDIR. 2017-08-01 17:06:57 -04:00
Thomas Harte
aaa60dab12 Fixed signedness of index. 2017-07-21 21:21:01 -04:00
Thomas Harte
e01f3f06c8 Completed curly bracket movement. 2017-03-26 14:34:47 -04:00
Thomas Harte
ced644b103 It seems likely that an AY divides its clock by 8, not 16. I had conflated wave frequency and counter clock. 2017-01-11 22:03:01 -05:00
Thomas Harte
36bc558798 Converted all 'Components' to postfix underscores. 2016-12-03 10:51:09 -05:00
Thomas Harte
7eeaac23e7 Reversed myself. I once again do not think the clock is divided by 256 for envelopes. 2016-11-11 20:31:48 -05:00
Thomas Harte
77987bf31e Decided to go with divide by 256 for the envelope counter after all. 2016-11-09 21:51:56 -05:00
Thomas Harte
77ce200fbb Simplified/corrected AY tone/noise mixer logic, and made a new guess at the effect of reading registers that are smaller than 8 bits. 2016-11-09 21:21:17 -05:00
Thomas Harte
21604376e6 Reintroduced clocking of the AY and boxed in the range of the master divider a little further. 2016-10-30 22:51:08 -04:00
Thomas Harte
fd823dc222 Settled on terminology. 2016-10-23 20:42:49 -04:00
Thomas Harte
b12f2f2796 Switched to more straightforward version of two-step loop, dealing with my mistaken dealing of when _master_divider&15 == 0 upon entry without adding an extra sanity check. Am also temporarily on non-modulo logic for tone generation, for a profiling test. 2016-10-23 20:32:48 -04:00
Thomas Harte
583db88299 Added a dispatch queue-powered Apple implementation of the async task queue, removed any mention of skip_samples in the AY since it isn't implemented. 2016-10-22 21:58:45 -04:00
Thomas Harte
33e628a096 Made an attempt to eliminate what amounts to manual division. 2016-10-21 22:16:44 -04:00
Thomas Harte
46a3c0922f Slightly simplified code, fixed divider. 2016-10-21 22:12:44 -04:00
Thomas Harte
d7c0c49715 Might as well be consistent with divider loads. 2016-10-21 20:07:14 -04:00
Thomas Harte
782ef960e1 Sought both to [start to] optimise the AY and correct divider reloads. It turns out that conditionals aren't that troubling. But I can probably eliminate the counters. 2016-10-21 20:05:38 -04:00
Thomas Harte
cd59eb5f43 Implemented non-linear volume. 2016-10-19 23:07:51 -04:00
Thomas Harte
08275c6241 Fixed mixer IO bit usage. 2016-10-19 22:22:15 -04:00
Thomas Harte
59162228ef Reduced mask for clarity. 2016-10-19 22:14:05 -04:00
Thomas Harte
319d7c2b12 Fixed premature wrapping of the envelope, played about with whether that should be subject to a predivision by 256. It feels unlikely? 2016-10-19 22:12:51 -04:00
Thomas Harte
6073906c39 Commented and fixed mistake that would equate any noise divider > 32768 with 0. 2016-10-19 21:51:35 -04:00
Thomas Harte
101f168ea4 Made an attempt to tidy up. 2016-10-19 21:43:18 -04:00
Thomas Harte
ada37abe23 Made an attempt to implement noise and envelopes. Not quite right yet. 2016-10-19 21:13:22 -04:00
Thomas Harte
bd6e6674a0 Fixed signed shift assumption and noise-related register test. 2016-10-18 22:20:12 -04:00
Thomas Harte
9669a5ec9b Switched to a more authentic interfacing to the AY. 2016-10-18 19:32:15 -04:00
Thomas Harte
43612e1ca2 Made an attempt to eliminate conditionals (running before I can walk?) and started edging towards an envelope generator. 2016-10-17 08:03:38 -04:00
Thomas Harte
9730e8247f Ensured propagation of synchronise messages, added enough to do plain tone. Probably. So: noise and envelopes missing. And it's all far too quiet. 2016-10-15 21:04:21 -04:00
Thomas Harte
51bdac27ae Made some AY advances; it's now being polled for samples and collecting more information on what it needs to output. 2016-10-15 17:45:39 -04:00
Thomas Harte
288d10c253 Got some keyboard reaction. 2016-10-14 21:44:15 -04:00
Thomas Harte
138eabcff4 Continued in my effort to wire up a keyboard. Will need further to continue. 2016-10-14 21:35:15 -04:00
Thomas Harte
d8e4c488c2 Started iterating towards having an AY and a fully-working keyboard. 2016-10-14 21:18:03 -04:00