114 Commits

Author	SHA1	Message	Date
Thomas Harte	e6854ff8db	Corrected typo: the input to an AY is BDIR, not BCDIR.	2017-08-01 17:06:57 -04:00
Thomas Harte	4abd62e62b	Standardises on const [Half]Cycles as the thing called and returned, rather than const [Half]Cycles & as it's explicitly defined to be only one int in size, so using a reference is overly weighty.	2017-07-27 22:05:29 -04:00
Thomas Harte	8361756dc4	Switched definitively to the works-for-now approach of requiring an explicit opt-in where somebody wants to clock a whole-cycle receiver from a half-cycle clock.	2017-07-27 07:40:02 -04:00
Thomas Harte	279c369a1f	Switched to Cycles as the result from the 6502 perform_bus_operation, helping slightly to clarify what you're intended to return and reducing type jumping within the 6502 implementation.	2017-07-25 22:21:09 -04:00
Thomas Harte	296c7cec05	Adopted flush widely.	2017-07-25 20:42:51 -04:00
Thomas Harte	75d67ee770	Relocated ClockReceiver.hpp as it's a dependency for parts of the static analyser, and therefore needs to be distinct from the actual emulation parts.	2017-07-25 20:20:55 -04:00
Thomas Harte	a1e9a54765	Eliminated redundant uses of ClockReceiver and sought to ensure that proper run_fors are inherited all the way down.	2017-07-25 20:09:13 -04:00
Thomas Harte	c1527cc9e2	Reduced back-and-forth between Cycles and ints within the Oric.	2017-07-24 22:46:31 -04:00
Thomas Harte	efdac2ce8c	The 6522 is now a ClockReceiver.	2017-07-24 22:29:09 -04:00
Thomas Harte	55ecb0c022	Converted the Microdisc into a ClockReceiver.	2017-07-24 21:51:13 -04:00
Thomas Harte	b7f88e8f61	Filter is now a ClockReciever, affecting all sound output devices.	2017-07-24 21:29:13 -04:00
Thomas Harte	8a2bdb8d22	Converted the TimedEventLoop and the things that sit atop it into ClockReceivers.	2017-07-24 21:19:05 -04:00
Thomas Harte	b82bef95f3	Decided to follow through on Cycles and HalfCycles as complete integer-alikes. Which means giving them the interesting range of operators. Also killed the implicit conversion to int as likely to lead to type confusion.	2017-07-24 20:10:05 -04:00
Thomas Harte	6369138bd1	Converted the Oric's video output into a ClockReceiver.	2017-07-22 23:11:30 -04:00
Thomas Harte	2ff157cf7a	Switched CRTMachine over to use Cycles as an explicit statement of units, and followed through on the effects of that.	2017-07-22 22:17:29 -04:00
Thomas Harte	83628b285b	Experimentally turned the 6502 into a clock receiver. No problem encountered.	2017-07-22 21:52:21 -04:00
Thomas Harte	3f609e17b3	Factored out the table-lookup approach to being a typer, and adjusted so as definitely to limit myself to positive offset table lookups.	2017-07-21 21:18:51 -04:00
Thomas Harte	52d9ddf9e5	Gave the binary tape player a more logical assignment of wave level to output level. Which miraculously appears to have been the issue with the ZX80/81 tape loading — the inconsistency of silences seems to have been the issue.	2017-06-21 22:13:24 -04:00
Thomas Harte	2562306802	Merge branch 'master' into Z80	2017-05-16 21:05:00 -04:00
Thomas Harte	a5075d9eb5	Formalised the reasoning behind the colour phase fix-up and made it an opt-in per-caller value. Only the Oric currently needs to opt in.	2017-05-16 20:31:39 -04:00
Thomas Harte	eb8a2de5d6	Settled definitively on flush as more communicative than synchronise (and slightly more locale neutral); culled some more duplication from the Z80.	2017-05-15 07:38:59 -04:00
Thomas Harte	0808e9b6fb	Pulled the 6502 into a CPU namespace, making it an instance of something that has micro-opcodes and schedules them, and factoring out the formulation of a register pair.	2017-05-14 22:08:15 -04:00
Thomas Harte	e01f3f06c8	Completed curly bracket movement.	2017-03-26 14:34:47 -04:00
Thomas Harte	90151e2094	Fixed to ensure a known initial control register value, which has taken effect.	2016-12-28 18:49:32 -05:00
Thomas Harte	a568172758	Made steps towards proper CRC generation. Am currently comparing against Oric disk images, as — amongst other things — they include precomputed CRCs.	2016-12-28 18:29:37 -05:00
Thomas Harte	e62be03673	Removed endianness assumption.	2016-12-10 19:10:33 -05:00
Thomas Harte	a5683dfb21	Removed now untrue comment.	2016-12-10 15:19:48 -05:00
Thomas Harte	0e71802b92	Reduced Oric video to single nibble constants. Removed attempt at asynchronous flush as no longer required.	2016-12-10 14:17:46 -05:00
Thomas Harte	580f347727	Fixed Oric SCART mode by having it change what it's giving to the CRT based on which shader it knows will be active.	2016-12-10 13:55:56 -05:00
Thomas Harte	a549fd1ecc	Introduced the ability simply to piggy-back off the CRT's natural phase for the colour burst, thereby eliminating a couple of redundant independent attempts in the Oric and Electron.	2016-12-10 13:42:34 -05:00
Thomas Harte	6cdd41e5a9	Added direct use of the colour ROM, uploading 16 bits per pixel to contain the entire ROM composite wave.	2016-12-09 22:17:10 -05:00
Thomas Harte	3b5962b171	This is an initial attempt at using the actual Oric colour ROM values for composite video generation.	2016-12-09 20:01:27 -05:00
Thomas Harte	c304db0f5a	Deintegrated the busy flag and the interrupt request line, as the latter is reset by status reads. Which also means I can start reporting the WD INTRQ line status directly from the Microdisc. That appears to be correct, rather than honouring the Microdisc IRQ select there.	2016-12-06 21:16:29 -05:00
Thomas Harte	2003b514aa	Switched the typer to postfix underscores.	2016-12-03 10:55:50 -05:00
Thomas Harte	81ee834530	As well as a bunch of logging, reinstated rotation position preservation across tracks.	2016-12-02 18:36:47 -05:00
Thomas Harte	93c573bfa9	Implemented missing status bits (other than the index hole), and a head loading delay for the Microdisc.	2016-12-01 21:13:16 -05:00
Thomas Harte	442986ee2c	Introduced a head loading path for 1793 machines.	2016-12-01 20:12:22 -05:00
Thomas Harte	82899f2f47	Ensured flag setting is atomic, removed duplication of interrupt request versus busy, found better names for the personality testers, unified delegate protocol.	2016-12-01 07:41:52 -05:00
Thomas Harte	9b6c5e814a	Now that it can be more explicit, this should admit that it's '93-based, not '73.	2016-11-28 16:22:35 -05:00
Thomas Harte	2f459690d4	It would appear the 1770 and 1773 actually differ in relation to the (non-sensical) ability not to spin-up for a Type 2, and whether a side compare can occur. So the WD1770 class now requires a personality to be specified. Which it singly fails to honour.	2016-11-26 23:29:30 +08:00
Thomas Harte	e9d6566e9c	Of course, changing the IRQ enable may immediately change the IRQ line. Signal if so.	2016-11-26 09:35:44 +08:00
Thomas Harte	73d30b9c00	Corrected typo.	2016-11-25 21:30:45 +08:00
Thomas Harte	12956901d6	Filled in some register mirrors.	2016-11-25 21:28:11 +08:00
Thomas Harte	54246c8f1a	Interrupt enabling works the other way around I think, and both registers with only one bit defined should probably return '1' in all other places?	2016-11-25 21:24:59 +08:00
Thomas Harte	8be81f6ebd	Supplied disks are given to the Microdisc.	2016-11-25 20:53:38 +08:00
Thomas Harte	4af678d2ed	Gave the Microdisc a clock signal, added just enough of force interrupt to avoid a spurious belief that a type 3 command has started.	2016-11-25 20:51:39 +08:00
Thomas Harte	5c019ad1c0	Okay, so it looks like both ROM paging flags are the opposite of what I previously had.	2016-11-25 20:42:40 +08:00
Thomas Harte	5be45c6c50	Ensured proper default behaviour.	2016-11-25 20:30:27 +08:00
Thomas Harte	d33f3b9224	This is the broad strokes effort at enabling Microdisc emulation.	2016-11-25 20:15:48 +08:00
Thomas Harte	7c2d9f3752	This seems to be right, per http://wiki.defence-force.org/doku.php?id=oric:hardware:floppy_disk_controller_wd1793	2016-11-22 22:35:43 +08:00