Thomas Harte
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eae1f78221
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Implemented the main page pushes.
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2017-05-19 19:28:38 -04:00 |
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Thomas Harte
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11d05fb3b8
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Expanded a little on operations, added an implementation or two.
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2017-05-19 19:18:35 -04:00 |
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Thomas Harte
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58efca835f
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Sought to add a further opcode.
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2017-05-18 22:53:43 -04:00 |
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Thomas Harte
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99f2060fc1
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Further improved macros.
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2017-05-18 22:11:54 -04:00 |
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Thomas Harte
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5d3ebcb35a
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Made a first attempt at LD HL, (nn).
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2017-05-17 22:42:30 -04:00 |
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Thomas Harte
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509d011fbe
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Implemented JP, my first Z80 operation.
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2017-05-17 22:31:41 -04:00 |
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Thomas Harte
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17ffd604bf
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Made an attempt to get the Z80 at least as far as rejecting an opcode.
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2017-05-17 21:45:23 -04:00 |
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Thomas Harte
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21d0602305
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Restored the all RAM 6502's lack of power-on reset.
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2017-05-17 21:43:40 -04:00 |
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Thomas Harte
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1378ab7278
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Ensured initial program counter and stack pointer are correct for Zexall, fixed the Z80 to use a compile-time polymorphic call for bus access.
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2017-05-17 07:36:06 -04:00 |
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Thomas Harte
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87a021ec2d
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Made further attempt to get as fas as having the Z80 attempt to do something.
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2017-05-16 22:19:40 -04:00 |
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Thomas Harte
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7190f927b7
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Factored out the stuff that both all-RAM processors would share, rather than duplicating it.
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2017-05-16 21:28:17 -04:00 |
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Thomas Harte
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d559d8b901
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Continued edging towards getting the absolute basics of a testable Z80, for test-driven development. Corrected old-fashioned instance naming issues with the corresponding 6502 class and removed an unnecessary source file while at it.
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2017-05-16 21:19:17 -04:00 |
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Thomas Harte
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50bb4f0142
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There's finally a loop in here, at least.
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2017-05-15 22:25:52 -04:00 |
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Thomas Harte
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7da51602d5
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Moved flush, added run_for_cycles, which does nothing right now.
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2017-05-15 07:59:21 -04:00 |
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Thomas Harte
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5152517887
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Added the boilerplate stuff necessary to query registers.
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2017-05-15 07:55:53 -04:00 |
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Thomas Harte
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eb8a2de5d6
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Settled definitively on flush as more communicative than synchronise (and slightly more locale neutral); culled some more duplication from the Z80.
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2017-05-15 07:38:59 -04:00 |
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Thomas Harte
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f2a1a906ff
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Adapted what negligible amount there is of the z80 as per the new CPU namespace.
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2017-05-14 22:15:16 -04:00 |
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Thomas Harte
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0808e9b6fb
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Pulled the 6502 into a CPU namespace, making it an instance of something that has micro-opcodes and schedules them, and factoring out the formulation of a register pair.
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2017-05-14 22:08:15 -04:00 |
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Thomas Harte
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b81a2cc273
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First tentative steps towards adding a Z80 implementation.
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2017-05-14 17:46:41 -04:00 |
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Thomas Harte
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defec2c9b0
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Fixed: operation reads now fulfil the promise of seeding the value to be read with 0xff.
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2017-03-26 20:56:27 -04:00 |
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Thomas Harte
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e01f3f06c8
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Completed curly bracket movement.
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2017-03-26 14:34:47 -04:00 |
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Thomas Harte
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55ce851bb2
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Fixed types of the 8k cartridges, ensured the 6502 starts without an IRQ request history.
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2017-03-18 17:04:01 -04:00 |
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Thomas Harte
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36b58d03b7
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Formalised read bus value guarantee from the 6502, fixed missing clock signal wiring on the Atari cartridge class, reintroduced CommaVid support.
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2017-03-18 14:46:46 -04:00 |
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Thomas Harte
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14a76af0d3
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Started trying to float out bus control to cartridges.
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2017-03-17 20:28:07 -04:00 |
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Thomas Harte
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5be22e2f8d
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Switched to suffix underscores and underscores in general for instance variables.
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2016-12-03 11:38:53 -05:00 |
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Thomas Harte
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7ad44f5152
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Flipped order of conditional so as negligibly to improve prediction.
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2016-10-31 22:17:18 -04:00 |
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Thomas Harte
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2452a3104f
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Corrected test: hitting zero is sufficient. No need to cross it.
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2016-10-30 20:24:30 -04:00 |
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Thomas Harte
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9309be229c
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Moved cycle count test down to the only places where it may actually yield a different result.
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2016-10-30 20:13:44 -04:00 |
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Thomas Harte
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a106018680
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Fixed initial state: interrupt flag is initially low.
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2016-10-28 21:22:03 -04:00 |
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Thomas Harte
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613b5b3f98
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Switched to inverse storage of the interrupt flag so as to reduce logical burden when storing IRQ line history.
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2016-10-28 20:52:43 -04:00 |
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Thomas Harte
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4408c60ef7
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This too should continue, not break, since it doesn't schedule a memory access.
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2016-10-27 18:32:21 -04:00 |
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Thomas Harte
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534b3d085d
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Improved test reporting, attempted to resolve timing errors just introduced (i.e. to differentiate break/continue where a cycle may or may not be spent).
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2016-10-27 08:41:44 -04:00 |
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Thomas Harte
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f84b66a5f4
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Made an attempt to fix wake-from-WAIT.
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2016-10-25 19:06:46 -04:00 |
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Thomas Harte
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4b18c76b84
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Introduced a bifurcation between break and continue to signify whether a bus access takes place, necessitating a shift in the location of the bus access but allowing the conditional to be dropped. Need to test.
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2016-10-25 18:45:53 -04:00 |
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Thomas Harte
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c253a4258f
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Made minor restructuring changes, slightly to reduce number of conditionals per operation and to drop a big hint to the optimiser.
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2016-10-25 18:34:24 -04:00 |
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Thomas Harte
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fa7c64bb5d
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Eventually reached an implementation of ADC that continues to satisfy all the formalised unit tests while also satisfying the manual BCDTest, that I need to find a way to formalise. I fixed the unit tests for Swift 3 while here, and attempted to do some unrelated NIB stuff with no real success.
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2016-10-03 22:03:39 -04:00 |
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Thomas Harte
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5d40d70c92
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Fixed 6560 addressing error, added an autotyper for Vic disks (more work potentially needed), fixed semantics for testing whether a 6502 is about to reset.
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2016-08-01 10:32:32 -04:00 |
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Thomas Harte
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740ea0b7e2
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Added overflow-flag setting logic and ensured disk ROM gets through regardless of ROM/disk installation order.
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2016-07-31 19:33:18 -04:00 |
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Thomas Harte
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1baf21827c
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Since the ROM is well disassembled, let's actually try to be a 1541 first.
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2016-07-06 22:17:32 -04:00 |
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Thomas Harte
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41809d4597
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Made an attempt at NMI usurption of IRQ/BRK.
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2016-06-29 20:59:45 -04:00 |
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Thomas Harte
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c02226bc41
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Ensured stack pointer goes the right way upon reset.
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2016-06-29 20:42:26 -04:00 |
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Thomas Harte
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db7c6430b5
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Fixed Klaus Dormann termination condition.
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2016-06-29 19:16:34 -04:00 |
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Thomas Harte
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0182b0483a
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Added a 'power on' flag that is set automatically at construction but can be declined. Saves all that stuff of every machine having to set and then unset the RST line, and fixes an Electron bug related to that.
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2016-06-29 19:13:24 -04:00 |
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Thomas Harte
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6419d9c485
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Added a single IRQ test case, discovering that I'm two cycles short. Whoops!
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2016-06-28 21:29:43 -04:00 |
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Thomas Harte
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6e698e908e
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Made an attempt to reduce cost of the most-likely path.
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2016-06-28 18:46:00 -04:00 |
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Thomas Harte
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574aa32b72
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Made an attempt to implement NMI. Some work to do on the B flag though, I think.
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2016-06-27 22:01:48 -04:00 |
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Thomas Harte
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88e2b382e5
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Made an attempt at a full and thorough 6532 implementation (and got a bit more explicit about flag size in the 6502).
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2016-06-20 18:57:35 -04:00 |
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Thomas Harte
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ef3ed1f436
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Implemented full paste ability for any machine that is a typer.
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2016-06-19 16:35:04 -04:00 |
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Thomas Harte
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06fb2ff1c7
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Started endeavouring to sketch out the boilerplate for writing a 6522 test harness. Added a default implementation of synchronise to the 6522 too, since not everybody is going to want one.
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2016-06-18 09:28:46 -04:00 |
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Thomas Harte
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5c4f35e13f
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Finally started on generalising the C++ stuff so as to be able to be able to get a working audio binding on the OS-specific side without further repetition by factoring an appropriate protocol out from the Electron and sketching out the correct speaker class for the Atari. Added a method to ask it what a good output frequency would be.
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2016-05-31 21:23:44 -04:00 |
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