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263 lines
7.7 KiB
C++
263 lines
7.7 KiB
C++
//
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// Amiga.cpp
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// Clock Signal
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//
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// Created by Thomas Harte on 16/07/2021.
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// Copyright © 2021 Thomas Harte. All rights reserved.
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//
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#include "Amiga.hpp"
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#include "../../Activity/Source.hpp"
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#include "../MachineTypes.hpp"
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#include "../../Processors/68000/68000.hpp"
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#include "../../Analyser/Static/Amiga/Target.hpp"
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#include "../Utility/MemoryPacker.hpp"
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#include "../Utility/MemoryFuzzer.hpp"
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//#define NDEBUG
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#define LOG_PREFIX "[Amiga] "
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#include "../../Outputs/Log.hpp"
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#include "Chipset.hpp"
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#include "Keyboard.hpp"
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#include "MemoryMap.hpp"
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#include <cassert>
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namespace {
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// NTSC clock rate: 2*3.579545 = 7.15909Mhz.
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// PAL clock rate: 7.09379Mhz; 227 cycles/line.
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constexpr int PALClockRate = 7'093'790;
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//constexpr int NTSCClockRate = 7'159'090;
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}
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namespace Amiga {
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class ConcreteMachine:
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public Activity::Source,
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public CPU::MC68000::BusHandler,
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public MachineTypes::AudioProducer,
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public MachineTypes::JoystickMachine,
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public MachineTypes::MappedKeyboardMachine,
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public MachineTypes::MediaTarget,
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public MachineTypes::MouseMachine,
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public MachineTypes::ScanProducer,
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public MachineTypes::TimedMachine,
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public Machine {
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public:
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ConcreteMachine(const Analyser::Static::Amiga::Target &target, const ROMMachine::ROMFetcher &rom_fetcher) :
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mc68000_(*this),
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memory_(target.chip_ram, target.fast_ram),
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chipset_(memory_, PALClockRate)
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{
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// Temporary: use a hard-coded Kickstart selection.
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constexpr ROM::Name rom_name = ROM::Name::AmigaA500Kickstart13;
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ROM::Request request(rom_name);
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auto roms = rom_fetcher(request);
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if(!request.validate(roms)) {
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throw ROMMachine::Error::MissingROMs;
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}
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Memory::PackBigEndian16(roms.find(rom_name)->second, memory_.kickstart.data());
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// For now, also hard-code assumption of PAL.
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// (Assumption is both here and in the video timing of the Chipset).
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set_clock_rate(PALClockRate);
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// Insert supplied media.
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insert_media(target.media);
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}
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// MARK: - MediaTarget.
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bool insert_media(const Analyser::Static::Media &media) final {
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return chipset_.insert(media.disks);
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}
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// MARK: - MC68000::BusHandler.
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using Microcycle = CPU::MC68000::Microcycle;
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HalfCycles perform_bus_operation(const CPU::MC68000::Microcycle &cycle, int) {
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// Do a quick advance check for Chip RAM access; add a suitable delay if required.
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HalfCycles total_length;
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if(cycle.operation & Microcycle::NewAddress && *cycle.address < 0x20'0000) {
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total_length = chipset_.run_until_after_cpu_slot().duration;
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assert(total_length >= cycle.length);
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} else {
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total_length = cycle.length;
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chipset_.run_for(total_length);
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}
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mc68000_.set_interrupt_level(chipset_.get_interrupt_level());
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// Check for assertion of reset.
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if(cycle.operation & Microcycle::Reset) {
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memory_.reset();
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LOG("Reset; PC is around " << PADHEX(8) << mc68000_.get_state().program_counter);
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}
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// Autovector interrupts.
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if(cycle.operation & Microcycle::InterruptAcknowledge) {
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mc68000_.set_is_peripheral_address(true);
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return total_length - cycle.length;
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}
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// Do nothing if no address is exposed.
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if(!(cycle.operation & (Microcycle::NewAddress | Microcycle::SameAddress))) return total_length - cycle.length;
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// Grab the target address to pick a memory source.
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const uint32_t address = cycle.host_endian_byte_address();
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// Set VPA if this is [going to be] a CIA access.
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mc68000_.set_is_peripheral_address((address & 0xe0'0000) == 0xa0'0000);
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if(!memory_.regions[address >> 18].read_write_mask) {
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if((cycle.operation & (Microcycle::SelectByte | Microcycle::SelectWord))) {
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// Check for various potential chip accesses.
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// Per the manual:
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//
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// CIA A is: 101x xxxx xx01 rrrr xxxx xxx0 (i.e. loaded into high byte)
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// CIA B is: 101x xxxx xx10 rrrr xxxx xxx1 (i.e. loaded into low byte)
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//
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// but in order to map 0xbfexxx to CIA A and 0xbfdxxx to CIA B, I think
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// these might be listed the wrong way around.
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//
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// Additional assumption: the relevant CIA select lines are connected
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// directly to the chip enables.
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if((address & 0xe0'0000) == 0xa0'0000) {
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const int reg = address >> 8;
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const bool select_a = !(address & 0x1000);
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const bool select_b = !(address & 0x2000);
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if(cycle.operation & Microcycle::Read) {
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uint16_t result = 0xffff;
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if(select_a) result &= 0xff00 | (chipset_.cia_a.read(reg) << 0);
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if(select_b) result &= 0x00ff | (chipset_.cia_b.read(reg) << 8);
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cycle.set_value16(result);
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} else {
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if(select_a) chipset_.cia_a.write(reg, cycle.value8_low());
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if(select_b) chipset_.cia_b.write(reg, cycle.value8_high());
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}
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// LOG("CIA " << (((address >> 12) & 3)^3) << " " << (cycle.operation & Microcycle::Read ? "read " : "write ") << std::dec << (reg & 0xf) << " of " << PADHEX(4) << +cycle.value16());
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} else if(address >= 0xdf'f000 && address <= 0xdf'f1be) {
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chipset_.perform(cycle);
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} else if(address >= 0xe8'0000 && address < 0xe9'0000) {
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// This is the Autoconf space; right now the only
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// Autoconf device this emulator implements is fast RAM,
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// which if present is provided as part of the memory map.
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//
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// Relevant quote: "The Zorro II configuration space is the 64K memory block $00E8xxxx"
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memory_.perform(cycle);
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} else {
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// This'll do for open bus, for now.
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if(cycle.operation & Microcycle::Read) {
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cycle.set_value16(0xffff);
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}
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// Don't log for the region that is definitely just ROM this machine doesn't have.
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if(address < 0xf0'0000) {
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LOG("Unmapped " << (cycle.operation & Microcycle::Read ? "read from " : "write to ") << PADHEX(6) << ((*cycle.address)&0xffffff) << " of " << cycle.value16());
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}
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}
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}
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} else {
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// A regular memory access.
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cycle.apply(
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&memory_.regions[address >> 18].contents[address],
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memory_.regions[address >> 18].read_write_mask
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);
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}
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return total_length - cycle.length;
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}
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void flush() {
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chipset_.flush();
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}
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private:
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CPU::MC68000::Processor<ConcreteMachine, true> mc68000_;
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// MARK: - Memory map.
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MemoryMap memory_;
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// MARK: - Chipset.
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Chipset chipset_;
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// MARK: - Activity Source
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void set_activity_observer(Activity::Observer *observer) final {
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chipset_.set_activity_observer(observer);
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}
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// MARK: - MachineTypes::AudioProducer.
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Outputs::Speaker::Speaker *get_speaker() final {
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return chipset_.get_speaker();
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}
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// MARK: - MachineTypes::ScanProducer.
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void set_scan_target(Outputs::Display::ScanTarget *scan_target) final {
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chipset_.set_scan_target(scan_target);
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}
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Outputs::Display::ScanStatus get_scaled_scan_status() const {
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return chipset_.get_scaled_scan_status();
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}
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// MARK: - MachineTypes::TimedMachine.
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void run_for(const Cycles cycles) {
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mc68000_.run_for(cycles);
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}
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// MARK: - MachineTypes::MouseMachine.
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Inputs::Mouse &get_mouse() final {
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return chipset_.get_mouse();;
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}
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// MARK: - MachineTypes::JoystickMachine.
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const std::vector<std::unique_ptr<Inputs::Joystick>> &get_joysticks() {
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return chipset_.get_joysticks();
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}
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// MARK: - Keyboard.
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Amiga::KeyboardMapper keyboard_mapper_;
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KeyboardMapper *get_keyboard_mapper() {
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return &keyboard_mapper_;
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}
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void set_key_state(uint16_t key, bool is_pressed) {
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chipset_.get_keyboard().set_key_state(key, is_pressed);
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}
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void clear_all_keys() {
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chipset_.get_keyboard().clear_all_keys();
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}
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};
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}
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using namespace Amiga;
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Machine *Machine::Amiga(const Analyser::Static::Target *target, const ROMMachine::ROMFetcher &rom_fetcher) {
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using Target = Analyser::Static::Amiga::Target;
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const Target *const amiga_target = dynamic_cast<const Target *>(target);
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return new Amiga::ConcreteMachine(*amiga_target, rom_fetcher);
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}
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Machine::~Machine() {}
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