Thomas Harte 108da64562 Fixed LD H, (HL) and LD L, (HL) by ensuring that whatever the subclass does goes to a temporary place before updating the address. Corrected the LD (IX+d), n machine cycle test for my new best-guess timing. This should leave only interrupt timing as currently amiss.		2017-06-20 22:25:00 -04:00
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Z80.cpp
Z80.hpp	Fixed LD H, (HL) and LD L, (HL) by ensuring that whatever the subclass does goes to a temporary place before updating the address. Corrected the LD (IX+d), n machine cycle test for my new best-guess timing. This should leave only interrupt timing as currently amiss.	2017-06-20 22:25:00 -04:00
Z80AllRAM.cpp	Explained refresh cycles to the all-RAM Z80.	2017-06-19 07:36:11 -04:00
Z80AllRAM.hpp