Thomas Harte 7af3de010e Suspected my mode 1 interrupt timing might be off. Reminded myself of the sources. Persuaded myself that it wasn't. Added appropriate comments.		2017-08-23 22:25:31 -04:00
..
AllSuiteA
Atari ROMs
BCDTest
Bridges	Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable.	2017-08-21 21:56:42 -04:00
FUSE
Klaus Dormann
Wolfgang Lorenz 6502 test suite
Zexall
6502InterruptTests.swift
6502TimingTests.swift	Corrected timestamp return, and its testing by the 6502 timing tests.	2017-07-27 21:19:16 -04:00
6522Tests.swift
6532Tests.swift
AllSuiteATests.swift
ArrayBuilderTests.mm
AtariStaticAnalyserTests.mm
BCDTest.swift	Completed fixture of the 6502 BCD test.	2017-07-25 22:55:45 -04:00
C1540Tests.swift
CRCTests.mm
DPLLTests.swift	Fixed the DigitalPhaseLockedLoopBridge bridge, once again fixing tests.	2017-07-16 20:55:57 -04:00
FUSETests.swift	Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests.	2017-07-27 20:17:13 -04:00
Info.plist
KlausDormannTests.swift
PCMPatchedTrackTests.mm	Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable.	2017-08-21 21:56:42 -04:00
PCMSegmentEventSourceTests.mm
PCMTrackTests.mm
TIATests.mm	The TIA is now a ClockReceiver.	2017-07-24 21:48:34 -04:00
TimeTests.mm
WolfgangLorenzTests.swift
Z80InterruptTests.swift	Suspected my mode 1 interrupt timing might be off. Reminded myself of the sources. Persuaded myself that it wasn't. Added appropriate comments.	2017-08-23 22:25:31 -04:00
Z80MachineCycleTests.swift	Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests.	2017-07-27 20:17:13 -04:00
Z80MemptrTests.swift	Added test for 16-bit arithmetic, and fixed implementation.	2017-07-26 19:04:52 -04:00
ZexallTests.swift