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130 lines
3.1 KiB
C++
130 lines
3.1 KiB
C++
//
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// Instruction.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 15/01/21.
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// Copyright © 2021 Thomas Harte. All rights reserved.
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//
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#ifndef InstructionSets_M50740_Instruction_h
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#define InstructionSets_M50740_Instruction_h
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#include <cstdint>
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#include "../AccessType.hpp"
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namespace InstructionSet {
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namespace M50740 {
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enum class AddressingMode {
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Implied, Accumulator, Immediate,
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Absolute, AbsoluteX, AbsoluteY,
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ZeroPage, ZeroPageX, ZeroPageY,
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XIndirect, IndirectY,
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Relative,
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AbsoluteIndirect, ZeroPageIndirect,
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SpecialPage,
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ImmediateZeroPage,
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Bit0Accumulator, Bit1Accumulator, Bit2Accumulator, Bit3Accumulator,
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Bit4Accumulator, Bit5Accumulator, Bit6Accumulator, Bit7Accumulator,
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Bit0ZeroPage, Bit1ZeroPage, Bit2ZeroPage, Bit3ZeroPage,
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Bit4ZeroPage, Bit5ZeroPage, Bit6ZeroPage, Bit7ZeroPage,
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Bit0AccumulatorRelative, Bit1AccumulatorRelative, Bit2AccumulatorRelative, Bit3AccumulatorRelative,
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Bit4AccumulatorRelative, Bit5AccumulatorRelative, Bit6AccumulatorRelative, Bit7AccumulatorRelative,
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Bit0ZeroPageRelative, Bit1ZeroPageRelative, Bit2ZeroPageRelative, Bit3ZeroPageRelative,
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Bit4ZeroPageRelative, Bit5ZeroPageRelative, Bit6ZeroPageRelative, Bit7ZeroPageRelative,
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};
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static constexpr auto MaxAddressingMode = int(AddressingMode::Bit7ZeroPageRelative);
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static constexpr auto MinAddressingMode = int(AddressingMode::Implied);
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constexpr int size(AddressingMode mode) {
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// This is coupled to the AddressingMode list above; be careful!
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constexpr int sizes[] = {
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0, 0, 0,
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2, 2, 2,
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1, 1, 1,
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1, 1,
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1,
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2, 1,
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1,
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2,
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0, 0, 0, 0,
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0, 0, 0, 0,
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1, 1, 1, 1,
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1, 1, 1, 1,
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1, 1, 1, 1,
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1, 1, 1, 1,
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2, 2, 2, 2,
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2, 2, 2, 2,
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};
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static_assert(sizeof(sizes)/sizeof(*sizes) == int(MaxAddressingMode) + 1);
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return sizes[int(mode)];
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}
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enum class Operation: uint8_t {
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Invalid,
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// Operations that don't access memory.
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BBC, BBS, BCC, BCS,
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BEQ, BMI, BNE, BPL,
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BVC, BVS, BRA, BRK,
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JMP, JSR,
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RTI, RTS,
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CLC, CLD, CLI, CLT, CLV,
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SEC, SED, SEI, SET,
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INX, INY, DEX, DEY,
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FST, SLW,
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NOP,
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PHA, PHP, PLA, PLP,
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STP,
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TAX, TAY, TSX, TXA,
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TXS, TYA,
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// Read operations.
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ADC, SBC,
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AND, ORA, EOR, BIT,
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CMP, CPX, CPY,
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LDA, LDX, LDY,
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TST,
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// Read-modify-write operations.
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ASL, LSR,
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CLB, SEB,
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COM,
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DEC, INC,
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ROL, ROR, RRF,
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// Write operations.
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LDM,
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STA, STX, STY,
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};
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static constexpr auto MaxOperation = int(Operation::STY);
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static constexpr auto MinOperation = int(Operation::BBC);
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constexpr AccessType access_type(Operation operation) {
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if(operation < Operation::ADC) return AccessType::None;
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if(operation < Operation::ASL) return AccessType::Read;
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if(operation < Operation::LDM) return AccessType::Write;
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return AccessType::ReadModifyWrite;
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}
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struct Instruction {
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Operation operation = Operation::Invalid;
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AddressingMode addressing_mode = AddressingMode::Implied;
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Instruction(Operation operation, AddressingMode addressing_mode) : operation(operation), addressing_mode(addressing_mode) {}
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Instruction(Operation operation) : operation(operation) {}
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Instruction() {}
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};
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}
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}
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#endif /* InstructionSets_M50740_Instruction_h */
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