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CLK
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Clock SignalTests
History
Thomas Harte
20a6bcc676
Added tests for the various
LD (nn), rr
instructions and corrected implementation to pass.
2017-07-22 11:39:13 -04:00
..
AllSuiteA
…
Atari ROMs
…
BCDTest
…
Bridges
Added Objective-C through wiring and a Swift test class for Memptr modifications. So far with a single test, that fails.
2017-07-21 22:52:25 -04:00
FUSE
…
Klaus Dormann
…
Wolfgang Lorenz 6502 test suite
…
Zexall
…
6502InterruptTests.swift
…
6502TimingTests.swift
…
6522Tests.swift
…
6532Tests.swift
…
AllSuiteATests.swift
…
ArrayBuilderTests.mm
…
AtariStaticAnalyserTests.mm
…
BCDTest.swift
…
C1540Tests.swift
…
CRCTests.mm
…
DPLLTests.swift
Fixed the
DigitalPhaseLockedLoopBridge
bridge, once again fixing tests.
2017-07-16 20:55:57 -04:00
FUSETests.swift
Disabled attempts at bus activity matching within the FUSE tests, at least until I settle on exactly what I intend to do.
2017-06-17 18:19:25 -04:00
Info.plist
…
KlausDormannTests.swift
…
PCMPatchedTrackTests.mm
…
PCMSegmentEventSourceTests.mm
…
PCMTrackTests.mm
…
TIATests.mm
…
TimeTests.mm
…
WolfgangLorenzTests.swift
Eliminates the 6502's specialised jam handler in favour of the generic trap handler, and simplifies the lookup costs of that as it's otherwise doubling execution costs.
2017-06-03 21:54:42 -04:00
Z80InterruptTests.swift
Introduced an NMI/wait interrupt timing test, and adjusted the Z80 to conform to information posted by Wilf Rigter.
2017-06-22 21:09:26 -04:00
Z80MachineCycleTests.swift
Fixed LD H, (HL) and LD L, (HL) by ensuring that whatever the subclass does goes to a temporary place before updating the address. Corrected the LD (IX+d), n machine cycle test for my new best-guess timing. This should leave only interrupt timing as currently amiss.
2017-06-20 22:25:00 -04:00
Z80MemptrTests.swift
Added tests for the various
LD (nn), rr
instructions and corrected implementation to pass.
2017-07-22 11:39:13 -04:00
ZexallTests.swift
Reinstated manual-by-stealth secondary usage of the Zexall test as a benchmarking tool.
2017-06-04 15:46:35 -04:00