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96 lines
2.6 KiB
C++
96 lines
2.6 KiB
C++
//
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// PowerPC.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 12/30/20.
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// Copyright © 2020 Thomas Harte. All rights reserved.
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//
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#ifndef PowerPC_hpp
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#define PowerPC_hpp
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#include <cstdint>
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namespace CPU {
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namespace Decoder {
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namespace PowerPC {
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enum class Model {
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MPC601,
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};
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// TODO: complete the following table.
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enum class Operation: uint8_t {
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Undefined,
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// These 601-exclusive instructions; a lot of them are carry-overs
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// from POWER.
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absx, clcs, divx, divsx, dozx, dozi, lscbxx, maskgx, maskirx, mulx,
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nabsx, rlmix, rribx, slex, sleqx, sliqx, slliqx, sllqx, slqx,
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sraiqx, sraqx, srex, sreax, sreqx, sriqx, srliqx, srlqx, srqx,
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// 32- and 64-bit PowerPC instructions.
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addx, addcx, addex, addi, addic, addic_, addis, addmex, addzex, andx,
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andcx, andi_, andis_, bx, bcx, bcctrx, bclrx, cmp, cmpi, cmpl, cmpli,
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cntlzwx, crand, crandc, creqv, crnand, crnor, cror, crorc, crxor, dcbf,
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dcbst, dcbt, dcbtst, dcbz, divwx, divwux, eciwx, ecowx, eieio, eqvx,
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extsbx, extshx, fabsx, faddx, faddsx, fcmpo, fcmpu, fctiwx, fctiwzx,
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fdivx, fdivsx, fmaddx, fmaddsx, fmrx, fmsubx, fmsubsx, fmulx, fmulsx,
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fnabsx, fnegx, fnmaddx, fnmaddsx, fnmsubx, fnmsubsx, frspx, fsubx, fsubsx,
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icbi, isync, lbz, lbzu, lbzux, lbzx, lfd, lfdu, lfdux, lfdx, lfs, lfsu,
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lfsux, lfsx, lha, lhau, lhaux, lhax, lhbrx, lhz, lhzu, lhzux, lhzx, lmw,
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lswi, lswx, lwarx, lwbrx, lwz, lwzu, lwzux, lwzx, mcrf, mcrfs, mcrxr,
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mfcr, mffsx, mfmsr, mfspr, mfsr, mfsrin, mtcrf, mtfsb0x, mtfsb1x, mtfsfx,
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mtfsfix, mtmsr, mtspr, mtsr, mtsrin, mulhwx, mulhwux, mulli, mullwx,
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nandx, negx, norx, orx, orcx, ori, oris, rfi, rlwimix, rlwinmx, rlwnmx,
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sc, slwx, srawx, srawix, srwx, stb, stbu, stbux, stbx, stfd, stfdu,
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stfdux, stfdx, stfs, stfsu, stfsux, stfsx, sth, sthbrx, sthu, sthux, sthx,
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stmw, stswi, stswx, stw, stwbrx, stwcx_, stwu, stwux, stwx, subfx, subfcx,
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subfex, subfic, subfmex, subfzex, sync, tlbie, tw, twi, xorx, xori, xoris,
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// 32-bit, supervisor level.
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dcbi,
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// Optional.
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fresx, frsqrtex, fselx, fsqrtx, frsqrtsx, slbia, slbie,
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// 64-bit only PowerPC instructions.
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cntlzdx, divdx, divdux, extswx, fcfidx, fctidx, fctidzx, tdi
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};
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struct Instruction {
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const Operation operation = Operation::Undefined;
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const uint32_t opcode = 0;
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Instruction(uint32_t opcode) : opcode(opcode) {}
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Instruction(Operation operation, uint32_t opcode) : operation(operation), opcode(opcode) {}
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// TODO: all field decoding here.
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};
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struct Decoder {
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public:
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Decoder(Model model);
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Instruction decode(uint32_t opcode);
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private:
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Model model_;
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bool is64bit() {
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return false;
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}
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bool is601() {
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return model_ == Model::MPC601;
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}
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};
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}
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}
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}
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#include <stdio.h>
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#endif /* PowerPC_hpp */
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