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234 lines
7.3 KiB
C++
234 lines
7.3 KiB
C++
//
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// Video.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 20/03/2024.
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// Copyright © 2024 Thomas Harte. All rights reserved.
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//
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#pragma once
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#include "../../../Outputs/Log.hpp"
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#include "../../../Outputs/CRT/CRT.hpp"
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#include <cstdint>
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namespace Archimedes {
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template <typename InterruptObserverT, typename SoundT>
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struct Video {
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Video(InterruptObserverT &observer, SoundT &sound, const uint8_t *ram) :
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observer_(observer),
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sound_(sound),
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ram_(ram),
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crt_(Outputs::Display::InputDataType::Red4Green4Blue4) {
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set_clock_divider(2);
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}
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void write(uint32_t value) {
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const auto target = (value >> 24) & 0xfc;
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const auto timing_value = [](uint32_t value) -> uint32_t {
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return (value >> 14) & 0x3ff;
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};
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switch(target) {
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case 0x00: case 0x04: case 0x08: case 0x0c:
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case 0x10: case 0x14: case 0x18: case 0x1c:
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case 0x20: case 0x24: case 0x28: case 0x2c:
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case 0x30: case 0x34: case 0x38: case 0x3c:
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logger.error().append("TODO: Video palette logical colour %d to %03x", (target >> 2), value & 0x1fff);
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break;
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case 0x40:
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logger.error().append("TODO: Video border colour to %03x", value & 0x1fff);
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break;
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case 0x44: case 0x48: case 0x4c:
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logger.error().append("TODO: Cursor colour %d to %03x", (target - 0x44) >> 2, value & 0x1fff);
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break;
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case 0x80:
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logger.error().append("TODO: Video horizontal period: %d", (value >> 14) & 0x3ff);
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horizontal_.period = timing_value(value);
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break;
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case 0x84:
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logger.error().append("TODO: Video horizontal sync width: %d", (value >> 14) & 0x3ff);
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horizontal_.sync_width = timing_value(value);
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break;
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case 0x88:
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logger.error().append("TODO: Video horizontal border start: %d", (value >> 14) & 0x3ff);
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horizontal_.border_start = timing_value(value);
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break;
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case 0x8c:
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logger.error().append("TODO: Video horizontal display start: %d", (value >> 14) & 0x3ff);
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horizontal_.display_start = timing_value(value);
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break;
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case 0x90:
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logger.error().append("TODO: Video horizontal display end: %d", (value >> 14) & 0x3ff);
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horizontal_.display_end = timing_value(value);
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break;
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case 0x94:
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logger.error().append("TODO: Video horizontal border end: %d", (value >> 14) & 0x3ff);
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horizontal_.border_end = timing_value(value);
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break;
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case 0x98:
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logger.error().append("TODO: Video horizontal cursor end: %d", (value >> 14) & 0x3ff);
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horizontal_.cursor_end = timing_value(value);
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break;
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case 0x9c:
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logger.error().append("TODO: Video horizontal interlace: %d", (value >> 14) & 0x3ff);
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break;
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case 0xa0:
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logger.error().append("TODO: Video vertical period: %d", (value >> 14) & 0x3ff);
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vertical_.period = timing_value(value);
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break;
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case 0xa4:
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logger.error().append("TODO: Video vertical sync width: %d", (value >> 14) & 0x3ff);
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vertical_.sync_width = timing_value(value);
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break;
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case 0xa8:
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logger.error().append("TODO: Video vertical border start: %d", (value >> 14) & 0x3ff);
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vertical_.border_start = timing_value(value);
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break;
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case 0xac:
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logger.error().append("TODO: Video vertical display start: %d", (value >> 14) & 0x3ff);
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vertical_.display_start = timing_value(value);
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break;
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case 0xb0:
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logger.error().append("TODO: Video vertical display end: %d", (value >> 14) & 0x3ff);
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vertical_.display_end = timing_value(value);
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break;
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case 0xb4:
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logger.error().append("TODO: Video vertical border end: %d", (value >> 14) & 0x3ff);
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vertical_.border_end = timing_value(value);
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break;
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case 0xb8:
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logger.error().append("TODO: Video vertical cursor start: %d", (value >> 14) & 0x3ff);
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vertical_.cursor_start = timing_value(value);
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break;
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case 0xbc:
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logger.error().append("TODO: Video vertical cursor end: %d", (value >> 14) & 0x3ff);
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vertical_.cursor_end = timing_value(value);
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break;
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case 0xe0:
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logger.error().append("TODO: video control: %08x", value);
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// Set pixel rate. This is the value that a 24Mhz clock should be divided
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// by to get half the pixel rate.
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switch(value & 0b11) {
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case 0b00: set_clock_divider(6); break; // i.e. pixel clock = 8Mhz.
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case 0b01: set_clock_divider(4); break; // 12Mhz.
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case 0b10: set_clock_divider(3); break; // 16Mhz.
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case 0b11: set_clock_divider(2); break; // 24Mhz.
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}
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break;
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//
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// Sound parameters.
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//
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case 0x60: case 0x64: case 0x68: case 0x6c:
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case 0x70: case 0x74: case 0x78: case 0x7c: {
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const uint8_t channel = ((value >> 26) + 7) & 7;
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sound_.set_stereo_image(channel, value & 7);
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} break;
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case 0xc0:
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sound_.set_frequency(value & 0x7f);
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break;
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default:
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logger.error().append("TODO: unrecognised VIDC write of %08x", value);
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break;
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}
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}
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void tick() {
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// TODO: real output. For now, just count up to complete frames and pretend a retrace goes there.
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++position_;
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if(position_ >= horizontal_.period * vertical_.period * clock_divider_) {
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entered_sync_ = true;
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position_ = 0;
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observer_.update_interrupts();
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}
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}
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/// @returns @c true if a vertical retrace interrupt has been signalled since the last call to @c interrupt(); @c false otherwise.
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bool interrupt() {
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// Guess: edge triggered?
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const bool interrupt = entered_sync_;
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entered_sync_ = false;
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return interrupt;
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}
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void set_frame_start(uint32_t address) { frame_start_ = address; }
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void set_buffer_start(uint32_t address) { buffer_start_ = address; }
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void set_buffer_end(uint32_t address) { buffer_end_ = address; }
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void set_cursor_start(uint32_t address) { cursor_start_ = address; }
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Outputs::CRT::CRT &crt() { return crt_; }
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const Outputs::CRT::CRT &crt() const { return crt_; }
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private:
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Log::Logger<Log::Source::ARMIOC> logger;
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InterruptObserverT &observer_;
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SoundT &sound_;
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// In the current version of this code, video DMA occurrs costlessly,
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// being deferred to the component itself.
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const uint8_t *ram_ = nullptr;
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Outputs::CRT::CRT crt_;
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// TODO: real video output.
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uint32_t position_ = 0;
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// Addresses.
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uint32_t buffer_start_;
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uint32_t buffer_end_;
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uint32_t frame_start_;
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uint32_t cursor_start_;
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// Horizontal and vertical timing.
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struct Dimension {
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uint32_t period = 0;
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uint32_t sync_width = 0;
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uint32_t border_start = 0;
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uint32_t border_end = 0;
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uint32_t display_start = 0;
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uint32_t display_end = 0;
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uint32_t cursor_start = 0;
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uint32_t cursor_end = 0;
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};
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Dimension horizontal_, vertical_;
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// An interrupt flag; more closely related to the interface by which
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// my implementation of the IOC picks up an interrupt request than
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// to hardware.
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bool entered_sync_ = false;
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// The divider that would need to be applied to a 24Mhz clock to
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// get half the current pixel clock; counting is in units of half
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// the pixel clock because that's the fidelity at which the programmer
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// places horizontal events — display start, end, sync period, etc.
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uint32_t clock_divider_ = 0;
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void set_clock_divider(uint32_t divider) {
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if(divider == clock_divider_) {
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return;
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}
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clock_divider_ = divider;
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crt_.set_new_timing(
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24'000'000 / (divider * 312 * 50), /* Cycle per line. */
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312, /* Height of display. */
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Outputs::CRT::PAL::ColourSpace,
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Outputs::CRT::PAL::ColourCycleNumerator,
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Outputs::CRT::PAL::ColourCycleDenominator,
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Outputs::CRT::PAL::VerticalSyncLength,
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Outputs::CRT::PAL::AlternatesPhase);
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}
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};
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}
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