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260 lines
8.2 KiB
C++
260 lines
8.2 KiB
C++
//
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// AuxiliaryMemorySwitches.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 22/10/2020.
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// Copyright © 2020 Thomas Harte. All rights reserved.
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//
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#ifndef AuxiliaryMemorySwitches_h
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#define AuxiliaryMemorySwitches_h
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namespace Apple {
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namespace II {
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/*!
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Models the auxiliary memory soft switches, added as of the Apple IIe, which allow access to the auxiliary 64kb of RAM and to
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the additional almost-4kb of ROM.
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Relevant memory accesses should be fed to this class; it'll call:
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* machine.set_main_paging() if anything in the 'main' state changes, i.e. the lower 48kb excluding the zero and stack pages;
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* machine.set_card_state() if anything changes with where ROM should appear rather than cards in the $Cxxx range; and
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* machine.set_zero_page_paging() if the selection of the lowest two pages of RAM changes.
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Implementation observation: as implemented on the IIe, the zero page setting also affects what happens in the language card area.
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*/
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template <typename Machine> class AuxiliaryMemorySwitches {
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public:
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static constexpr bool Auxiliary = true;
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static constexpr bool Main = false;
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static constexpr bool ROM = true;
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static constexpr bool Card = false;
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/// Describes banking state between $0200 and $BFFF.
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struct MainState {
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struct Region {
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/// @c true indicates auxiliary memory should be read from in this region; @c false indicates that main memory should be used.
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bool read = false;
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/// @c true indicates auxiliary memory should be written to in this region; @c false indicates that main memory should be used.
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bool write = false;
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};
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/// Describes banking state in the ranges $0200–$3FFF, $0800–$1FFF and $4000–$BFFF.
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Region base;
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/// Describes banking state in the range $0400–$7FFF.
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Region region_04_08;
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/// Describes banking state in the range $2000–$3FFF.
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Region region_20_40;
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bool operator != (const MainState &rhs) const {
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return
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base.read != rhs.base.read || base.write != rhs.base.write ||
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region_04_08.read != rhs.region_04_08.read || region_04_08.write != rhs.region_04_08.write ||
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region_20_40.read != rhs.region_20_40.read || region_20_40.write != rhs.region_20_40.write;
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}
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};
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/// Describes banking state between $C100 and $Cfff.
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struct CardState {
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/// @c true indicates that the built-in ROM should appear from $C100 to $C2FF @c false indicates that cards should service those accesses.
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bool region_C1_C3 = false;
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/// @c true indicates that the built-in ROM should appear from $C300 to $C3FF; @c false indicates that cards should service those accesses.
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bool region_C3 = false;
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/// @c true indicates that the built-in ROM should appear from $C400 to $C7FF; @c false indicates that cards should service those accesses.
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bool region_C4_C8 = false;
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/// @c true indicates that the built-in ROM should appear from $C800 to $CFFF; @c false indicates that cards should service those accesses.
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bool region_C8_D0 = false;
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bool operator != (const CardState &rhs) const {
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return
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region_C1_C3 != rhs.region_C1_C3 ||
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region_C3 != rhs.region_C3 ||
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region_C4_C8 != rhs.region_C4_C8 ||
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region_C8_D0 != rhs.region_C8_D0;
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}
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};
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/// Descibes banking state between $0000 and $01ff; @c true indicates that auxiliary memory should be used; @c false indicates main memory.
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using ZeroState = bool;
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/// Returns raw switch state for all switches that affect banking, even if they're logically video switches.
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struct SwitchState {
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bool read_auxiliary_memory = false;
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bool write_auxiliary_memory = false;
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bool internal_CX_rom = false;
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bool slot_C3_rom = false;
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bool internal_C8_rom = false;
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bool store_80 = false;
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bool alternative_zero_page = false;
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bool video_page_2 = false;
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bool high_resolution = false;
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};
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AuxiliaryMemorySwitches(Machine &machine) : machine_(machine) {}
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/// Used by an owner to forward, at least, any access in the range $C000 to $C00B,
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/// in $C054 to $C058, or in the range $C300 to $CFFF. Safe to call for any [16-bit] address.
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void access(uint16_t address, bool is_read) {
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if(address >= 0xc300 && address < 0xd000) {
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switches_.internal_C8_rom |= ((address >> 8) == 0xc3) && !switches_.slot_C3_rom;
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switches_.internal_C8_rom &= (address != 0xcfff);
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set_card_paging();
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return;
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}
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if(address < 0xc000 || address >= 0xc058) return;
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switch(address) {
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default: break;
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case 0xc000: case 0xc001:
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if(!is_read) {
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switches_.store_80 = address & 1;
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set_main_paging();
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}
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break;
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case 0xc002: case 0xc003:
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if(!is_read) {
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switches_.read_auxiliary_memory = address & 1;
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set_main_paging();
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}
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break;
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case 0xc004: case 0xc005:
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if(!is_read) {
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switches_.write_auxiliary_memory = address & 1;
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set_main_paging();
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}
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break;
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case 0xc006: case 0xc007:
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if(!is_read) {
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switches_.internal_CX_rom = address & 1;
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set_card_paging();
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}
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break;
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case 0xc008: case 0xc009:
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if(!is_read && switches_.alternative_zero_page != bool(address & 1)) {
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switches_.alternative_zero_page = address & 1;
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set_zero_page_paging();
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}
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break;
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case 0xc00a: case 0xc00b:
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if(!is_read) {
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switches_.slot_C3_rom = address & 1;
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set_card_paging();
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}
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break;
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case 0xc054: case 0xc055:
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switches_.video_page_2 = address & 1;
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set_main_paging();
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break;
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case 0xc056: case 0xc057:
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switches_.high_resolution = address & 1;
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set_main_paging();
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break;
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}
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}
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/// Provides part of the IIgs interface.
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void set_state(uint8_t value) {
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switches_.alternative_zero_page = value & 0x80;
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switches_.video_page_2 = value & 0x40;
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switches_.read_auxiliary_memory = value & 0x20;
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switches_.write_auxiliary_memory = value & 0x10;
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switches_.internal_CX_rom = value & 0x01;
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set_main_paging();
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set_zero_page_paging();
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set_card_paging();
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}
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const MainState &main_state() const {
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return main_state_;
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}
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const CardState &card_state() const {
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return card_state_;
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}
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const ZeroState zero_state() const {
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return switches_.alternative_zero_page;
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}
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const SwitchState switches() const {
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return switches_;
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}
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private:
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Machine &machine_;
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SwitchState switches_;
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MainState main_state_;
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void set_main_paging() {
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const auto previous_state = main_state_;
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// The two appropriately named switches provide the base case.
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main_state_.base.read = switches_.read_auxiliary_memory;
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main_state_.base.write = switches_.write_auxiliary_memory;
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if(switches_.store_80) {
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// If store 80 is set, use the page 2 flag for the lower carve out;
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// if both store 80 and high resolution are set, use the page 2 flag for both carve outs.
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main_state_.region_04_08.read = main_state_.region_04_08.write = switches_.video_page_2;
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if(switches_.high_resolution) {
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main_state_.region_20_40.read = main_state_.region_20_40.write = switches_.video_page_2;
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} else {
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main_state_.region_20_40 = main_state_.base;
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}
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} else {
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main_state_.region_04_08 = main_state_.region_20_40 = main_state_.base;
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}
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if(previous_state != main_state_) {
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machine_.set_main_paging();
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}
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}
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CardState card_state_;
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void set_card_paging() {
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const auto previous_state = card_state_;
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// By default apply the CX switch through to $C7FF.
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card_state_.region_C1_C3 = card_state_.region_C4_C8 = switches_.internal_CX_rom;
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// Allow the C3 region to be switched to internal ROM in isolation even if the rest of the
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// first half of the CX region is diabled, if its specific switch is also disabled.
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if(!switches_.internal_CX_rom && !switches_.slot_C3_rom) {
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card_state_.region_C3 = true;
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} else {
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card_state_.region_C3 = card_state_.region_C1_C3;
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}
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// Apply the CX switch to $C800+, but also allow the C8 switch to select that region in isolation.
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card_state_.region_C8_D0 = switches_.internal_CX_rom || switches_.internal_C8_rom;
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if(previous_state != card_state_) {
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machine_.set_card_paging();
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}
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}
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void set_zero_page_paging() {
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// Believe it or not, the zero page is just set or cleared by a single flag.
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// As though life were rational.
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machine_.set_zero_page_paging();
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}
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};
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}
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}
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#endif /* AuxiliaryMemorySwitches_h */
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