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CLK/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-3.CSL
2024-06-28 21:52:04 -04:00

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XML

;
; Fichier de script CSL
; Execution du module SHAKE26C du DSK SHAKER26.DSK en CRTC 3
; Le module genere des instructions au format SSM
;
csl_version 1.0
crtc_select 3
reset
wait 3000000
disk_insert 'shaker26.dsk'
key_delay 70000 70000 400000
key_output 'RUN"SHAKE26C"\(RET)'
wait 10000000
; test prevu pour CRTC 2 mais disp autre crc Last Line cond
key_output '7'
wait 64000000
key_output ' '
wait 1000000 ; menu
;
; test crtc 2 vma' sur R1=0
key_output 'T'
wait 1100000
key_output ' '
wait 1200000
key_output ' '
wait 1200000
key_output ' '
wait 1200000
key_output ' '
wait 1000000 ; menu
; crtc 2 ghost vsync vs Last Line (others crtc welcome)
key_output '\(RET)'
wait 5000000 ; 2cd
key_output ' '
wait 2000000 ; 2ce
key_output ' '
wait 1000000 ; menu
; Add Line R5 on last line
key_output 'E'
wait 10000000 ; 2c9
key_output ' '
wait 5000000 ; 2ca
key_output ' '
wait 1000000 ; menu
; r5 additional line in interlace mode
key_output 'S'
wait 2000000 ; 2d3
key_output ' '
wait 1000000 ; menu
; CRTC 2 Interlace vsync nightmare (2 1er test uniqu CRTC1)
key_output 'O'
wait 6000000 ; cvstot 2d6
key_output ' '
wait 3500000 ; cvstot 2d7
key_output ' '
wait 2000000 ; parity00
wait 8000000
key_output ' '
wait 10000000 ; cvms_a 2d8
key_output ' '
wait 10000000 ; cvms_b
key_output ' '
wait 10000000 ; cvms_b
key_output ' '
wait 10000000 ; cvms_c
key_output ' '
wait 10000000 ; cvms_c
key_output ' '
wait 10000000 ; menu
; Y crtc 3/4 parity
key_output 'Y'
wait 4500000 ; 2df
key_output ' '
wait 1000000 ; 2e0
key_output ' '
wait 1000000 ; 2e1
key_output ' '
wait 1000000 ; 2e2
key_output ' '
wait 10000000 ; menu
; R9/R4 UPD LAST LIMIT
key_output 'R'
wait 5000000
key_output ' '
wait 10000000 ; menu
reset