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137 lines
3.5 KiB
C++
137 lines
3.5 KiB
C++
//
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// TestRunner68000.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 28/06/2019.
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// Copyright © 2019 Thomas Harte. All rights reserved.
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//
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#pragma once
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#include <array>
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#include <functional>
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#include <vector>
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#include "../../../Processors/68000/68000.hpp"
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using namespace InstructionSet::M68k;
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/*!
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Provides a 68000 with 64kb of RAM in its low address space;
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/RESET will put the supervisor stack pointer at 0xFFFF and
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begin execution at 0x0400.
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*/
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class RAM68000: public CPU::MC68000::BusHandler {
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public:
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RAM68000() : m68000_(*this) {}
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uint32_t initial_pc() const {
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return 0x1000;
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}
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void set_program(
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const std::vector<uint16_t> &program,
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uint32_t stack_pointer = 0x206
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) {
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memcpy(&ram_[0x1000 >> 1], program.data(), program.size() * sizeof(uint16_t));
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// Ensure the condition codes start unset and set the initial program counter
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// and supervisor stack pointer, as well as starting in supervisor mode.
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auto registers = m68000_.get_state().registers;
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registers.status = 0x2700;
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registers.program_counter = initial_pc();
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registers.supervisor_stack_pointer = stack_pointer;
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m68000_.decode_from_state(registers);
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}
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void set_registers(std::function<void(InstructionSet::M68k::RegisterSet &)> func) {
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auto state = m68000_.get_state();
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func(state.registers);
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m68000_.set_state(state);
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}
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void will_perform(uint32_t, uint16_t) {
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--instructions_remaining_;
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if(instructions_remaining_ < 0) {
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throw StopException();
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}
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}
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void run_for_instructions(int count) {
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duration_ = HalfCycles(0);
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instructions_remaining_ = count;
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if(!instructions_remaining_) return;
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try {
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while(true) {
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run_for(HalfCycles(2000));
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}
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} catch (const StopException &) {}
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}
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void run_for(HalfCycles cycles) {
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m68000_.run_for(cycles);
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}
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uint16_t *ram_at(uint32_t address) {
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return &ram_[(address >> 1) % ram_.size()];
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}
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template <typename Microcycle> HalfCycles perform_bus_operation(const Microcycle &cycle, int) {
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const uint32_t word_address = cycle.word_address();
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duration_ += cycle.length;
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if(cycle.data_select_active()) {
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if(cycle.operation & CPU::MC68000::Operation::InterruptAcknowledge) {
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cycle.value->b = 10;
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} else {
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switch(cycle.operation & (CPU::MC68000::Operation::SelectWord | CPU::MC68000::Operation::SelectByte | CPU::MC68000::Operation::Read)) {
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default: break;
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case CPU::MC68000::Operation::SelectWord | CPU::MC68000::Operation::Read:
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cycle.value->w = ram_[word_address % ram_.size()];
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break;
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case CPU::MC68000::Operation::SelectByte | CPU::MC68000::Operation::Read:
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cycle.value->b = ram_[word_address % ram_.size()] >> cycle.byte_shift();
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break;
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case CPU::MC68000::Operation::SelectWord:
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ram_[word_address % ram_.size()] = cycle.value->w;
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break;
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case CPU::MC68000::Operation::SelectByte:
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ram_[word_address % ram_.size()] = uint16_t(
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(cycle.value->b << cycle.byte_shift()) |
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(ram_[word_address % ram_.size()] & cycle.untouched_byte_mask())
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);
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break;
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}
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}
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}
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return HalfCycles(0);
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}
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CPU::MC68000::State get_processor_state() {
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return m68000_.get_state();
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}
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auto &processor() {
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return m68000_;
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}
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int get_cycle_count() {
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return int(duration_.as_integral()) >> 1;
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}
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void reset_cycle_count() {
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duration_ = HalfCycles(0);
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}
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private:
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struct StopException {};
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CPU::MC68000::Processor<RAM68000, true, true, true> m68000_;
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std::array<uint16_t, 256*1024> ram_{};
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int instructions_remaining_;
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HalfCycles duration_;
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};
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