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341 lines
12 KiB
C++
341 lines
12 KiB
C++
//
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// State.cpp
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// Clock Signal
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//
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// Created by Thomas Harte on 14/05/2020.
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// Copyright © 2020 Thomas Harte. All rights reserved.
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//
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#include "State.hpp"
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#include <cassert>
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using namespace CPU::MC68000;
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State::State(const ProcessorBase &src): State() {
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// Registers.
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for(int c = 0; c < 7; ++c) {
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registers.address[c] = src.address_[c].full;
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registers.data[c] = src.data_[c].full;
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}
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registers.data[7] = src.data_[7].full;
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registers.user_stack_pointer = src.is_supervisor_ ? src.stack_pointers_[0].full : src.address_[7].full;
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registers.supervisor_stack_pointer = src.is_supervisor_ ? src.address_[7].full : src.stack_pointers_[1].full;
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registers.status = src.get_status();
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registers.program_counter = src.program_counter_.full;
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registers.prefetch = src.prefetch_queue_.full;
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registers.instruction = src.decoded_instruction_.full;
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// Inputs.
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inputs.bus_interrupt_level = uint8_t(src.bus_interrupt_level_);
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inputs.dtack = src.dtack_;
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inputs.is_peripheral_address = src.is_peripheral_address_;
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inputs.bus_error = src.bus_error_;
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inputs.bus_request = src.bus_request_;
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inputs.bus_grant = false; // TODO (within the 68000).
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inputs.halt = src.halt_;
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// Execution state.
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execution_state.e_clock_phase = src.e_clock_phase_.as<uint8_t>();
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execution_state.effective_address[0] = src.effective_address_[0].full;
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execution_state.effective_address[1] = src.effective_address_[1].full;
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execution_state.source_data = src.source_bus_data_.full;
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execution_state.destination_data = src.destination_bus_data_.full;
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execution_state.last_trace_flag = src.last_trace_flag_;
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execution_state.next_word = src.next_word_;
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execution_state.dbcc_false_address = src.dbcc_false_address_;
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execution_state.is_starting_interrupt = src.is_starting_interrupt_;
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execution_state.pending_interrupt_level = uint8_t(src.pending_interrupt_level_);
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execution_state.accepted_interrupt_level = uint8_t(src.accepted_interrupt_level_);
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execution_state.movem_final_address = src.movem_final_address_;
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static_assert(sizeof(execution_state.source_addresses) == sizeof(src.precomputed_addresses_));
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memcpy(&execution_state.source_addresses, &src.precomputed_addresses_, sizeof(src.precomputed_addresses_));
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// This is collapsed to a Boolean; if there is an active program then it's the
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// one implied by the current instruction.
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execution_state.active_program = src.active_program_;
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// Slightly dodgy assumption here: the Phase enum will always exactly track
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// the 68000's ExecutionState enum.
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execution_state.phase = ExecutionState::Phase(src.execution_state_);
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auto contained_by = [](const auto *source, const auto *reference) -> bool {
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while(true) {
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if(source == reference) return true;
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if(source->is_terminal()) return false;
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++source;
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}
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};
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// Store enough information to relocate the MicroOp.
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const ProcessorBase::MicroOp *micro_op_base = nullptr;
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if(src.active_program_) {
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micro_op_base = &src.all_micro_ops_[src.instructions[src.decoded_instruction_.full].micro_operations];
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assert(contained_by(micro_op_base, src.active_micro_op_));
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execution_state.micro_op_source = ExecutionState::MicroOpSource::ActiveProgram;
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} else {
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if(contained_by(src.long_exception_micro_ops_, src.active_micro_op_)) {
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execution_state.micro_op_source = ExecutionState::MicroOpSource::LongException;
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micro_op_base = src.long_exception_micro_ops_;
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} else if(contained_by(src.short_exception_micro_ops_, src.active_micro_op_)) {
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execution_state.micro_op_source = ExecutionState::MicroOpSource::ShortException;
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micro_op_base = src.short_exception_micro_ops_;
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} else if(contained_by(src.interrupt_micro_ops_, src.active_micro_op_)) {
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execution_state.micro_op_source = ExecutionState::MicroOpSource::Interrupt;
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micro_op_base = src.interrupt_micro_ops_;
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} else {
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assert(false);
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}
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}
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execution_state.micro_op = uint8_t(src.active_micro_op_ - micro_op_base);
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// Encode the BusStep.
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struct BusStepOption {
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const ProcessorBase::BusStep *const base;
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const ExecutionState::BusStepSource source = ExecutionState::BusStepSource::FollowMicroOp;
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};
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BusStepOption bus_step_options[] = {
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{
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src.reset_bus_steps_,
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ExecutionState::BusStepSource::Reset
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},
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{
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src.branch_taken_bus_steps_,
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ExecutionState::BusStepSource::BranchTaken
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},
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{
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src.branch_byte_not_taken_bus_steps_,
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ExecutionState::BusStepSource::BranchByteNotTaken
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},
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{
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src.branch_word_not_taken_bus_steps_,
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ExecutionState::BusStepSource::BranchWordNotTaken
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},
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{
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src.bsr_bus_steps_,
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ExecutionState::BusStepSource::BSR
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},
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{
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src.dbcc_condition_true_steps_,
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ExecutionState::BusStepSource::DBccConditionTrue
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},
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{
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src.dbcc_condition_false_no_branch_steps_,
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ExecutionState::BusStepSource::DBccConditionFalseNoBranch
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},
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{
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src.dbcc_condition_false_branch_steps_,
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ExecutionState::BusStepSource::DBccConditionFalseBranch
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},
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{
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src.movem_read_steps_,
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ExecutionState::BusStepSource::MovemRead
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},
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{
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src.movem_write_steps_,
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ExecutionState::BusStepSource::MovemWrite
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},
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{
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src.trap_steps_,
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ExecutionState::BusStepSource::Trap
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},
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{
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src.bus_error_steps_,
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ExecutionState::BusStepSource::BusError
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},
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{
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&src.all_bus_steps_[src.active_micro_op_->bus_program],
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ExecutionState::BusStepSource::FollowMicroOp
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},
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{nullptr}
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};
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const BusStepOption *bus_step_option = bus_step_options;
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const ProcessorBase::BusStep *bus_step_base = nullptr;
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while(bus_step_option->base) {
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if(contained_by(bus_step_option->base, src.active_step_)) {
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bus_step_base = bus_step_option->base;
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execution_state.bus_step_source = bus_step_option->source;
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break;
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}
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++bus_step_option;
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}
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assert(bus_step_base);
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execution_state.bus_step = uint8_t(src.active_step_ - bus_step_base);
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}
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void State::apply(ProcessorBase &target) {
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// Registers.
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for(int c = 0; c < 7; ++c) {
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target.address_[c].full = registers.address[c];
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target.data_[c].full = registers.data[c];
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}
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target.data_[7].full = registers.data[7];
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target.stack_pointers_[0] = registers.user_stack_pointer;
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target.stack_pointers_[1] = registers.supervisor_stack_pointer;
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target.address_[7] = target.stack_pointers_[(registers.status & 0x2000) >> 13];
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target.set_status(registers.status);
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target.program_counter_.full = registers.program_counter;
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target.prefetch_queue_.full = registers.prefetch;
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target.decoded_instruction_.full = registers.instruction;
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// Inputs.
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target.bus_interrupt_level_ = inputs.bus_interrupt_level;
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target.dtack_ = inputs.dtack;
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target.is_peripheral_address_ = inputs.is_peripheral_address;
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target.bus_error_ = inputs.bus_error;
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target.bus_request_ = inputs.bus_request;
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// TODO: bus_grant.
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target.halt_ = inputs.halt;
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// Execution state.
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target.e_clock_phase_ = HalfCycles(execution_state.e_clock_phase);
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target.effective_address_[0].full = execution_state.effective_address[0];
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target.effective_address_[1].full = execution_state.effective_address[1];
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target.source_bus_data_.full = execution_state.source_data;
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target.destination_bus_data_.full = execution_state.destination_data;
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target.last_trace_flag_ = execution_state.last_trace_flag;
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target.next_word_ = execution_state.next_word;
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target.dbcc_false_address_ = execution_state.dbcc_false_address;
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target.is_starting_interrupt_ = execution_state.is_starting_interrupt;
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target.pending_interrupt_level_ = execution_state.pending_interrupt_level;
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target.accepted_interrupt_level_ = execution_state.accepted_interrupt_level;
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target.movem_final_address_ = execution_state.movem_final_address;
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static_assert(sizeof(execution_state.source_addresses) == sizeof(target.precomputed_addresses_));
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memcpy(&target.precomputed_addresses_, &execution_state.source_addresses, sizeof(target.precomputed_addresses_));
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// See above; this flag indicates whether to populate the field.
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target.active_program_ =
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execution_state.active_program ?
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&target.instructions[target.decoded_instruction_.full] : nullptr;
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// Dodgy assumption duplicated here from above.
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target.execution_state_ = CPU::MC68000::ProcessorStorage::ExecutionState(execution_state.phase);
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// Decode the MicroOp.
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switch(execution_state.micro_op_source) {
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case ExecutionState::MicroOpSource::ActiveProgram:
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target.active_micro_op_ = &target.all_micro_ops_[target.active_program_->micro_operations];
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break;
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case ExecutionState::MicroOpSource::LongException:
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target.active_micro_op_ = target.long_exception_micro_ops_;
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break;
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case ExecutionState::MicroOpSource::ShortException:
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target.active_micro_op_ = target.short_exception_micro_ops_;
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break;
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case ExecutionState::MicroOpSource::Interrupt:
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target.active_micro_op_ = target.interrupt_micro_ops_;
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break;
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}
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target.active_micro_op_ += execution_state.micro_op;
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// Decode the BusStep.
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switch(execution_state.bus_step_source) {
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case ExecutionState::BusStepSource::Reset:
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target.active_step_ = target.reset_bus_steps_;
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break;
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case ExecutionState::BusStepSource::BranchTaken:
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target.active_step_ = target.branch_taken_bus_steps_;
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break;
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case ExecutionState::BusStepSource::BranchByteNotTaken:
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target.active_step_ = target.branch_byte_not_taken_bus_steps_;
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break;
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case ExecutionState::BusStepSource::BranchWordNotTaken:
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target.active_step_ = target.branch_word_not_taken_bus_steps_;
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break;
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case ExecutionState::BusStepSource::BSR:
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target.active_step_ = target.bsr_bus_steps_;
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break;
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case ExecutionState::BusStepSource::DBccConditionTrue:
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target.active_step_ = target.dbcc_condition_true_steps_;
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break;
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case ExecutionState::BusStepSource::DBccConditionFalseNoBranch:
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target.active_step_ = target.dbcc_condition_false_no_branch_steps_;
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break;
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case ExecutionState::BusStepSource::DBccConditionFalseBranch:
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target.active_step_ = target.dbcc_condition_false_branch_steps_;
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break;
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case ExecutionState::BusStepSource::MovemRead:
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target.active_step_ = target.movem_read_steps_;
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break;
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case ExecutionState::BusStepSource::MovemWrite:
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target.active_step_ = target.movem_write_steps_;
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break;
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case ExecutionState::BusStepSource::Trap:
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target.active_step_ = target.trap_steps_;
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break;
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case ExecutionState::BusStepSource::BusError:
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target.active_step_ = target.bus_error_steps_;
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break;
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case ExecutionState::BusStepSource::FollowMicroOp:
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target.active_step_ = &target.all_bus_steps_[target.active_micro_op_->bus_program];
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break;
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}
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target.active_step_ += execution_state.bus_step;
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}
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// Boilerplate follows here, to establish 'reflection'.
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State::State() {
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if(needs_declare()) {
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DeclareField(registers);
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DeclareField(execution_state);
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DeclareField(inputs);
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}
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}
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State::Registers::Registers() {
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if(needs_declare()) {
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DeclareField(data);
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DeclareField(address);
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DeclareField(user_stack_pointer);
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DeclareField(supervisor_stack_pointer);
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DeclareField(status);
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DeclareField(program_counter);
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DeclareField(prefetch);
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DeclareField(instruction);
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}
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}
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State::Inputs::Inputs() {
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if(needs_declare()) {
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DeclareField(bus_interrupt_level);
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DeclareField(dtack);
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DeclareField(is_peripheral_address);
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DeclareField(bus_error);
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DeclareField(bus_request);
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DeclareField(bus_grant);
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DeclareField(halt);
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}
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}
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State::ExecutionState::ExecutionState() {
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if(needs_declare()) {
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DeclareField(e_clock_phase);
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DeclareField(effective_address);
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DeclareField(source_data);
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DeclareField(destination_data);
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DeclareField(last_trace_flag);
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DeclareField(next_word);
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DeclareField(dbcc_false_address);
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DeclareField(is_starting_interrupt);
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DeclareField(pending_interrupt_level);
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DeclareField(accepted_interrupt_level);
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DeclareField(active_program);
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DeclareField(movem_final_address);
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DeclareField(source_addresses);
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AnnounceEnum(Phase);
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DeclareField(phase);
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AnnounceEnum(MicroOpSource);
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DeclareField(micro_op_source);
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DeclareField(micro_op);
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AnnounceEnum(BusStepSource);
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DeclareField(bus_step_source);
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DeclareField(bus_step);
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}
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}
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