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161 lines
4.0 KiB
C++
161 lines
4.0 KiB
C++
//
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// Chipset.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 22/07/2021.
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// Copyright © 2021 Thomas Harte. All rights reserved.
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//
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#ifndef Chipset_hpp
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#define Chipset_hpp
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#include <cstddef>
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#include <cstdint>
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#include "../../Processors/68000/68000.hpp"
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#include "../../Outputs/CRT/CRT.hpp"
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#include "Blitter.hpp"
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namespace Amiga {
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class Chipset {
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public:
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Chipset(uint16_t *ram, size_t size);
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/// @returns The duration from now until the beginning of the next
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/// available CPU slot for accessing chip memory.
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HalfCycles time_until_cpu_slot();
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struct Changes {
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int hsyncs = 0;
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int vsyncs = 0;
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int interrupt_level = 0;
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HalfCycles duration;
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};
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/// Advances the stated amount of time.
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Changes run_for(HalfCycles);
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/// Advances to the next available CPU slot.
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Changes run_until_cpu_slot();
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/// Performs the provided microcycle, which the caller guarantees to be a memory access.
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void perform(const CPU::MC68000::Microcycle &);
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/// Sets the current state of the CIA interrupt lines.
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void set_cia_interrupts(bool cia_a, bool cia_b);
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/// Provides the chipset's current interrupt level.
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int get_interrupt_level() {
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return interrupt_level_;
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}
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// The standard CRT set.
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void set_scan_target(Outputs::Display::ScanTarget *scan_target);
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Outputs::Display::ScanStatus get_scaled_scan_status() const;
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void set_display_type(Outputs::Display::DisplayType);
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Outputs::Display::DisplayType get_display_type() const;
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private:
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// MARK: - Interrupts.
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uint16_t interrupt_enable_ = 0;
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uint16_t interrupt_requests_ = 0;
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int interrupt_level_ = 0;
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void update_interrupts();
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// MARK: - Scheduler.
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template <bool stop_on_cpu> Changes run(HalfCycles duration = HalfCycles());
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template <bool stop_on_cpu> int advance_slots(int, int);
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template <int cycle, bool stop_if_cpu> bool perform_cycle();
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template <int cycle> void output();
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// MARK: - DMA Control, Scheduler and Blitter.
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uint16_t dma_control_ = 0;
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Blitter blitter_;
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// MARK: - Sprites.
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struct Sprite {
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void set_pointer(int shift, uint16_t value);
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void set_start_position(uint16_t value);
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void set_stop_and_control(uint16_t value);
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void set_image_data(int slot, uint16_t value);
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} sprites_[8];
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// MARK: - Raster.
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int line_cycle_ = 0, y_ = 0;
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int line_length_ = 227;
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int frame_height_ = 312;
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int vertical_blank_height_ = 29;
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uint16_t display_window_start_[2] = {0, 0};
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uint16_t display_window_stop_[2] = {0, 0};
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uint16_t fetch_window_[2] = {0, 0};
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// MARK: - Copper.
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class Copper {
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public:
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Copper(Chipset &chipset, uint16_t *ram, size_t size) : chipset_(chipset), ram_(ram), ram_mask_(uint32_t(size - 1)) {}
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/// Offers a DMA slot to the Copper, specifying the current beam position.
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///
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/// @returns @c true if the slot was used; @c false otherwise.
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bool advance(uint16_t position);
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/// Forces a reload of address @c id (i.e. 0 or 1) and restarts the Copper.
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void reload(int id) {
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address_ = addresses_[id] >> 1;
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state_ = State::FetchFirstWord;
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}
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/// Writes the word @c value to the address register @c id, shifting it by @c shift (0 or 16) first.
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template <int id, int shift> void set_address(uint16_t value) {
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addresses_[id] = (addresses_[id] & (0xffff'0000 >> shift)) | uint32_t(value << shift);
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}
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/// Sets the Copper control word.
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void set_control(uint16_t c) {
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control_ = c;
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}
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/// Forces the Copper into the stopped state.
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void stop() {
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state_ = State::Stopped;
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}
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private:
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Chipset &chipset_;
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uint32_t address_ = 0;
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uint32_t addresses_[2]{};
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uint16_t control_ = 0;
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enum class State {
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FetchFirstWord, FetchSecondWord, Waiting, Stopped,
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} state_ = State::Stopped;
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bool skip_next_ = false;
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uint16_t instruction_[2]{};
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uint16_t position_mask_ = 0xffff;
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uint16_t *ram_ = nullptr;
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uint32_t ram_mask_ = 0;
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} copper_;
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friend Copper;
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// MARK: - Pixel output.
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Outputs::CRT::CRT crt_;
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uint16_t palette_[32]{};
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};
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}
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#endif /* Chipset_hpp */
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