CLK/Outputs/CRT.cpp

//
//  CRT.cpp
//  Clock Signal
//
//  Created by Thomas Harte on 19/07/2015.
//  Copyright © 2015 Thomas Harte. All rights reserved.
//

#include "CRT.hpp"
#include <stdarg.h>

static const int bufferWidth = 512;
static const int bufferHeight = 512;

using namespace Outputs;

CRT::CRT(int cycles_per_line, int number_of_buffers, ...)
{
	_horizontalOffset = 0.0f;
	_verticalOffset = 0.0f;

	_numberOfBuffers = number_of_buffers;
	_bufferSizes = new int[_numberOfBuffers];
	_buffers = new uint8_t *[_numberOfBuffers];

	va_list va;
	va_start(va, number_of_buffers);
	for(int c = 0; c < _numberOfBuffers; c++)
	{
		_bufferSizes[c] = va_arg(va, int);
		_buffers[c] = new uint8_t[bufferHeight * bufferWidth * _bufferSizes[c]];
	}
	va_end(va);

	_write_allocation_pointer = 0;
}

CRT::~CRT()
{
	delete[] _bufferSizes;
	for(int c = 0; c < _numberOfBuffers; c++)
	{
		delete[] _buffers[c];
	}
	delete[] _buffers;
}

void CRT::output_sync(int number_of_cycles)
{
	// horizontal sync is edge triggered; vertical is integrated
	_syncCapacitorChargeLevel += number_of_cycles;
}

void CRT::output_level(int number_of_cycles, std::string type)
{
	_syncCapacitorChargeLevel -= number_of_cycles;
}

void CRT::output_data(int number_of_cycles, std::string type)
{
	_syncCapacitorChargeLevel -= number_of_cycles;
}

#pragma mark - Buffer supplying

void CRT::allocate_write_area(int required_length)
{
	int xPos = _write_allocation_pointer & (bufferWidth - 1);
	if (xPos + required_length > bufferWidth)
	{
		_write_allocation_pointer &= ~(bufferWidth - 1);
		_write_allocation_pointer = (_write_allocation_pointer + bufferWidth) & ((bufferHeight-1) * bufferWidth);
	}

	_write_target_pointer = _write_allocation_pointer;
	_write_allocation_pointer += required_length;
}

uint8_t *CRT::get_write_target_for_buffer(int buffer)
{
	return &_buffers[buffer][_write_target_pointer * _bufferSizes[buffer]];
}