This website requires JavaScript.
Explore
Mirrors
Help
Sign In
6502
/
CLK
Watch
1
Star
0
Fork
0
You've already forked CLK
mirror of
https://github.com/TomHarte/CLK.git
synced
2024-11-23 03:32:32 +00:00
Code
Issues
Projects
Releases
Wiki
Activity
4db61d98f4
CLK
/
Outputs
History
Thomas Harte
c18cc4c8f5
It appears the Vic's output is sine-ish, after all. Also adjusted centre of display, simultaneously adding some validation on that.
2016-06-14 07:29:35 -04:00
..
CRT
It appears the Vic's output is sine-ish, after all. Also adjusted centre of display, simultaneously adding some validation on that.
2016-06-14 07:29:35 -04:00
Speaker.cpp
Edging towards audio output; the speaker is given appropriate input and output rates, and then updated with current divider and enabled/disabled status.
2016-01-13 21:03:43 -05:00
Speaker.hpp
Extended to allow floating-point sampling rates. Which makes sense.
2016-06-13 19:30:41 -04:00