Thomas Harte 7af3de010e Suspected my mode 1 interrupt timing might be off. Reminded myself of the sources. Persuaded myself that it wasn't. Added appropriate comments.		2017-08-23 22:25:31 -04:00
..
AllSuiteA
Atari ROMs	Added a readme, as is traditional for folders I'm excluding from Git.	2017-03-12 22:16:12 -04:00
BCDTest
Bridges	Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable.	2017-08-21 21:56:42 -04:00
FUSE	After hitting my head against the wall of trying to use [NS]Scanner as a parser some more, have given up and transcoded the two tests files to JSON.	2017-05-25 18:20:13 -04:00
Klaus Dormann
Wolfgang Lorenz 6502 test suite
Zexall	Imported the Zexall.com tester, as a first thing to throw at the Z80 to be.	2017-05-16 21:37:09 -04:00
6502InterruptTests.swift	Renamed TestMachine to TestMachine6502 since there's going to be multiple of them.	2017-05-15 08:18:57 -04:00
6502TimingTests.swift	Corrected timestamp return, and its testing by the 6502 timing tests.	2017-07-27 21:19:16 -04:00
6522Tests.swift
6532Tests.swift	Tested against public ROMs and corrected. Also moved the deferred adjustment into a more canonical place.	2017-03-04 17:00:28 -05:00
AllSuiteATests.swift	Adjusted slightly to adapt to latest Swift warnings.	2017-05-17 07:49:48 -04:00
ArrayBuilderTests.mm
AtariStaticAnalyserTests.mm	Added an attempt to distinguish the MegaBoy (now with proper capitalisation) and a test for it.	2017-03-13 20:43:12 -04:00
BCDTest.swift	Completed fixture of the 6502 BCD test.	2017-07-25 22:55:45 -04:00
C1540Tests.swift
CRCTests.mm
DPLLTests.swift	Fixed the DigitalPhaseLockedLoopBridge bridge, once again fixing tests.	2017-07-16 20:55:57 -04:00
FUSETests.swift	Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests.	2017-07-27 20:17:13 -04:00
Info.plist
KlausDormannTests.swift	Adjusted slightly to adapt to latest Swift warnings.	2017-05-17 07:49:48 -04:00
PCMPatchedTrackTests.mm	Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable.	2017-08-21 21:56:42 -04:00
PCMSegmentEventSourceTests.mm
PCMTrackTests.mm
TIATests.mm	The TIA is now a ClockReceiver.	2017-07-24 21:48:34 -04:00
TimeTests.mm
WolfgangLorenzTests.swift	Eliminates the 6502's specialised jam handler in favour of the generic trap handler, and simplifies the lookup costs of that as it's otherwise doubling execution costs.	2017-06-03 21:54:42 -04:00
Z80InterruptTests.swift	Suspected my mode 1 interrupt timing might be off. Reminded myself of the sources. Persuaded myself that it wasn't. Added appropriate comments.	2017-08-23 22:25:31 -04:00
Z80MachineCycleTests.swift	Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests.	2017-07-27 20:17:13 -04:00
Z80MemptrTests.swift	Added test for 16-bit arithmetic, and fixed implementation.	2017-07-26 19:04:52 -04:00
ZexallTests.swift	Reinstated manual-by-stealth secondary usage of the Zexall test as a benchmarking tool.	2017-06-04 15:46:35 -04:00