6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-25 16:31:42 +00:00
Code Issues Projects Releases Wiki Activity
5d5fe52144
CLK/Components/6850
History
Thomas Harte 5d5fe52144 Corrects transmission logic — exactly hitting write_data_time_remaining now works properly.
2019-10-20 20:38:55 -04:00
..
6850.cpp Corrects transmission logic — exactly hitting write_data_time_remaining now works properly. 2019-10-20 20:38:55 -04:00
6850.hpp The ACIA actually has two clocks, though on an ST they're both 500,000 Hz. 2019-10-20 20:38:55 -04:00