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CLK
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CLK
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OSBindings
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Mac
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Clock SignalTests
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Bridges
History
Thomas Harte
6575091a78
Fixed Z80's ownership of its fetch-decode-execute program, its habit of scheduling invalidly when hitting an unrecognised operation and the test machine's habit of dereferencing invalidly.
2017-05-22 21:50:34 -04:00
..
C1540Bridge.h
…
C1540Bridge.mm
Started trying to clean up, including commuting the C1540 source file name to match its class name but mainly by adding documentation.
2016-07-10 07:46:20 -04:00
Clock SignalTests-Bridging-Header.h
Adjusted slightly to adapt to latest Swift warnings.
2017-05-17 07:49:48 -04:00
DigitalPhaseLockedLoopBridge.h
Added test of perfect DPLL input timing.
2016-07-12 21:42:23 -04:00
DigitalPhaseLockedLoopBridge.mm
Added test of perfect DPLL input timing.
2016-07-12 21:42:23 -04:00
MOS6522Bridge.h
…
MOS6522Bridge.mm
…
MOS6532Bridge.h
…
MOS6532Bridge.mm
…
TestMachine6502.h
Renamed
TestMachine
to
TestMachine6502
since there's going to be multiple of them.
2017-05-15 08:18:57 -04:00
TestMachine6502.mm
Added enough of a Z80 test machine to bridge up into Swift.
2017-05-16 22:05:42 -04:00
TestMachineZ80.h
Made an attempt to log bus activity for comparison with FUSE results.
2017-05-22 19:49:38 -04:00
TestMachineZ80.mm
Fixed Z80's ownership of its fetch-decode-execute program, its habit of scheduling invalidly when hitting an unrecognised operation and the test machine's habit of dereferencing invalidly.
2017-05-22 21:50:34 -04:00