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287 lines
8.6 KiB
Plaintext
287 lines
8.6 KiB
Plaintext
//
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// 68000BCDTests.m
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// Clock SignalTests
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//
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// Created by Thomas Harte on 29/06/2019.
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//
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// Largely ported from the tests of the Portable 68k Emulator.
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//
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#import <XCTest/XCTest.h>
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#include "TestRunner68000.hpp"
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@interface M68000BCDTests : XCTestCase
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@end
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@implementation M68000BCDTests {
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std::unique_ptr<RAM68000> _machine;
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}
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- (void)setUp {
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_machine = std::make_unique<RAM68000>();
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}
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- (void)tearDown {
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_machine.reset();
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}
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// MARK: ABCD
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- (void)testABCD {
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_machine->set_program({
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0xc302, // ABCD D2, D1
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});
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_machine->set_registers([=](auto ®isters){
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registers.data[1] = 0x1234567a;
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registers.data[2] = 0xf745ff78;
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});
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssert(state.registers.status & ConditionCode::Carry);
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XCTAssertEqual(state.registers.data[1], 0x12345658);
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XCTAssertEqual(state.registers.data[2], 0xf745ff78);
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}
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- (void)testABCDZero {
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_machine->set_program({
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0xc302, // ABCD D2, D1
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});
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_machine->set_registers([=](auto ®isters){
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registers.data[1] = 0x12345600;
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registers.data[2] = 0x12345600;
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registers.status = ConditionCode::Zero;
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});
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssert(state.registers.status & ConditionCode::Zero);
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XCTAssertEqual(state.registers.data[1], 0x12345600);
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XCTAssertEqual(state.registers.data[2], 0x12345600);
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}
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- (void)testABCDNegative {
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_machine->set_program({
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0xc302, // ABCD D2, D1
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});
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_machine->set_registers([=](auto ®isters){
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registers.data[1] = 0x12345645;
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registers.data[2] = 0x12345654;
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registers.status = ConditionCode::Zero;
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});
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssert(state.registers.status & ConditionCode::Negative);
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XCTAssertEqual(state.registers.data[1], 0x12345699);
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XCTAssertEqual(state.registers.data[2], 0x12345654);
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}
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- (void)testABCDWithX {
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_machine->set_program({
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0xc302, // ABCD D2, D1
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});
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_machine->set_registers([=](auto ®isters){
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registers.data[1] = 0x12345645;
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registers.data[2] = 0x12345654;
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registers.status = ConditionCode::Extend;
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});
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssert(state.registers.status & ConditionCode::Carry);
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XCTAssertEqual(state.registers.data[1], 0x12345600);
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XCTAssertEqual(state.registers.data[2], 0x12345654);
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}
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- (void)testABCDOverflow {
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_machine->set_program({
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0xc302, // ABCD D2, D1
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});
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_machine->set_registers([=](auto ®isters){
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registers.data[1] = 0x1234563e;
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registers.data[2] = 0x1234563e;
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registers.status = ConditionCode::Extend;
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});
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssert(state.registers.status & ConditionCode::Overflow);
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XCTAssertEqual(state.registers.data[1], 0x12345683);
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XCTAssertEqual(state.registers.data[2], 0x1234563e);
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}
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- (void)testABCDPredecDifferent {
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_machine->set_program({
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0xc30a, // ABCD -(A2), -(A1)
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});
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_machine->set_registers([=](auto ®isters){
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registers.address[1] = 0x3001;
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registers.address[2] = 0x4001;
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registers.status = ConditionCode::Extend;
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});
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*_machine->ram_at(0x3000) = 0xa200;
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*_machine->ram_at(0x4000) = 0x1900;
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssert(state.registers.status & ConditionCode::Carry);
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XCTAssert(state.registers.status & ConditionCode::Extend);
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XCTAssertEqual(state.registers.address[1], 0x3000);
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XCTAssertEqual(state.registers.address[2], 0x4000);
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XCTAssertEqual(*_machine->ram_at(0x3000), 0x2200);
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XCTAssertEqual(*_machine->ram_at(0x4000), 0x1900);
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}
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- (void)testABCDPredecSame {
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_machine->set_program({
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0xc309, // ABCD -(A1), -(A1)
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});
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_machine->set_registers([=](auto ®isters){
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registers.address[1] = 0x3002;
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registers.status = ConditionCode::Extend;
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});
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*_machine->ram_at(0x3000) = 0x19a2;
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssert(state.registers.status & ConditionCode::Carry);
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XCTAssert(state.registers.status & ConditionCode::Extend);
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XCTAssertEqual(state.registers.address[1], 0x3000);
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XCTAssertEqual(*_machine->ram_at(0x3000), 0x22a2);
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}
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// MARK: NBCD
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- (void)performNBCDd1:(uint32_t)d1 ccr:(uint8_t)ccr {
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_machine->set_program({
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0x4801 // NBCD D1
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});
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_machine->set_registers([=](auto ®isters){
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registers.status |= ccr;
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registers.data[1] = d1;
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});
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_machine->run_for_instructions(1);
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XCTAssertEqual(6, _machine->get_cycle_count());
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}
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- (void)testNBCD_Dn {
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[self performNBCDd1:0x7a ccr:0];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.registers.data[1], 0x20);
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XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Extend | ConditionCode::Carry | ConditionCode::Overflow);
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}
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- (void)testNBCD_Dn_extend {
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[self performNBCDd1:0x1234567a ccr:ConditionCode::Extend | ConditionCode::Zero];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.registers.data[1], 0x1234561f);
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XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Extend | ConditionCode::Carry | ConditionCode::Overflow);
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}
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- (void)testNBCD_Dn_zero {
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[self performNBCDd1:0x12345600 ccr:ConditionCode::Zero];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.registers.data[1], 0x12345600);
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XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Zero);
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}
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- (void)testNBCD_Dn_negative {
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[self performNBCDd1:0x123456ff ccr:ConditionCode::Extend | ConditionCode::Zero];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.registers.data[1], 0x1234569a);
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XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Extend | ConditionCode::Carry | ConditionCode::Negative);
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}
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- (void)testNBCD_Dn_XXXw {
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_machine->set_program({
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0x4838, 0x3000 // NBCD ($3000).w
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});
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*_machine->ram_at(0x3000) = 0x0100;
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(16, _machine->get_cycle_count());
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XCTAssertEqual(*_machine->ram_at(0x3000), 0x9900);
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XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Extend | ConditionCode::Carry | ConditionCode::Negative);
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}
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// MARK: SBCD
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- (void)performSBCDd1:(uint32_t)d1 d2:(uint32_t)d2 ccr:(uint8_t)ccr {
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_machine->set_program({
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0x8302 // SBCD D2, D1
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});
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_machine->set_registers([=](auto ®isters){
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registers.status |= ccr;
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registers.data[1] = d1;
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registers.data[2] = d2;
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});
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(6, _machine->get_cycle_count());
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XCTAssertEqual(state.registers.data[2], d2);
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}
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- (void)testSBCD_Dn {
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[self performSBCDd1:0x12345689 d2:0xf745ff78 ccr:ConditionCode::Zero];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.registers.data[1], 0x12345611);
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XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, 0);
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}
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- (void)testSBCD_Dn_zero {
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[self performSBCDd1:0x123456ff d2:0xf745ffff ccr:ConditionCode::Zero];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.registers.data[1], 0x12345600);
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XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Zero);
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}
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- (void)testSBCD_Dn_negative {
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[self performSBCDd1:0x12345634 d2:0xf745ff45 ccr:ConditionCode::Extend];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.registers.data[1], 0x12345688);
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XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Extend | ConditionCode::Carry | ConditionCode::Negative);
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}
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- (void)testSBCD_Dn_overflow {
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[self performSBCDd1:0x123456a9 d2:0xf745ffff ccr:ConditionCode::Extend];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.registers.data[1], 0x12345643);
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XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Extend | ConditionCode::Carry | ConditionCode::Overflow);
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}
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- (void)testSBCD_Dn_PreDec {
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_machine->set_program({
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0x830a // SBCD -(A2), -(A1)
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});
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*_machine->ram_at(0x3000) = 0xa200;
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*_machine->ram_at(0x4000) = 0x1900;
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_machine->set_registers([=](auto ®isters){
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registers.address[1] = 0x3001;
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registers.address[2] = 0x4001;
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registers.status |= ConditionCode::Extend;
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});
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(18, _machine->get_cycle_count());
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XCTAssertEqual(*_machine->ram_at(0x3000), 0x8200);
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XCTAssertEqual(*_machine->ram_at(0x4000), 0x1900);
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XCTAssertEqual(state.registers.status & ConditionCode::AllConditions, ConditionCode::Negative);
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}
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@end
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