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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-30 04:50:08 +00:00
CLK/Components
2017-03-18 17:34:34 -04:00
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1770 Added a CRC check for read address, ensured CRC, lost data and record not found are initially reset. 2017-01-01 21:00:25 -05:00
6522
6532 Reinstated the 16 and 32 kb Atari pagers, and ensured the 6532 always starts in a valid state. 2017-03-18 17:34:34 -04:00
6560
AY38910 It seems likely that an AY divides its clock by 8, not 16. I had conflated wave frequency and counter clock. 2017-01-11 22:03:01 -05:00