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188 lines
5.5 KiB
C++
188 lines
5.5 KiB
C++
//
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// MFP68901.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 06/10/2019.
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// Copyright © 2019 Thomas Harte. All rights reserved.
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//
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#ifndef MFP68901_hpp
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#define MFP68901_hpp
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#include <cstdint>
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#include "../../ClockReceiver/ClockReceiver.hpp"
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#include "../../ClockReceiver/ClockingHintSource.hpp"
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namespace Motorola {
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namespace MFP68901 {
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class PortHandler {
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public:
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// TODO: announce changes in output.
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};
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/*!
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Models the Motorola 68901 Multi-Function Peripheral ('MFP').
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*/
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class MFP68901: public ClockingHint::Source {
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public:
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/// @returns the result of a read from @c address.
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uint8_t read(int address);
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/// Performs a write of @c value to @c address.
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void write(int address, uint8_t value);
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/// Advances the MFP by the supplied number of HalfCycles.
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void run_for(HalfCycles);
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/// @returns the number of cycles until the next possible sequence point — the next time
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/// at which the interrupt line _might_ change. This object conforms to ClockingHint::Source
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/// so that mechanism can also be used to reduce the quantity of calls into this class.
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///
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/// @discussion TODO, alas.
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HalfCycles get_next_sequence_point();
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/// Sets the current level of either of the timer event inputs — TAI and TBI in datasheet terms.
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void set_timer_event_input(int channel, bool value);
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/// Sets a port handler, a receiver that will be notified upon any change in GPIP output.
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///
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/// @discussion TODO.
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void set_port_handler(PortHandler *);
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/// Sets the current input GPIP values.
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void set_port_input(uint8_t);
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/// @returns the current GPIP output values.
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///
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/// @discussion TODO.
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uint8_t get_port_output();
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/// @returns @c true if the interrupt output is currently active; @c false otherwise.s
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bool get_interrupt_line();
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static constexpr int NoAcknowledgement = 0x100;
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/// Communicates an interrupt acknowledge cycle.
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///
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/// @returns the vector placed on the bus if any; @c NoAcknowledgement if nothing is loaded.
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int acknowledge_interrupt();
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struct InterruptDelegate {
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/// Informs the delegate of a change in the interrupt line of the nominated MFP.
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virtual void mfp68901_did_change_interrupt_status(MFP68901 *) = 0;
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};
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/// Sets a delegate that will be notified upon any change in the interrupt line.
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void set_interrupt_delegate(InterruptDelegate *delegate);
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// ClockingHint::Source.
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ClockingHint::Preference preferred_clocking() final;
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private:
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// MARK: - Timers
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enum class TimerMode {
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Stopped, EventCount, Delay, PulseWidth
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};
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void set_timer_mode(int timer, TimerMode, int prescale, bool reset_timer);
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void set_timer_data(int timer, uint8_t);
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uint8_t get_timer_data(int timer);
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void decrement_timer(int timer, int amount);
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struct Timer {
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TimerMode mode = TimerMode::Stopped;
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uint8_t value = 0;
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uint8_t reload_value = 0;
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int prescale = 1;
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int prescale_count = 1;
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bool event_input = false;
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} timers_[4];
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uint8_t timer_ab_control_[2] = { 0, 0 };
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uint8_t timer_cd_control_ = 0;
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HalfCycles cycles_left_;
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// MARK: - GPIP
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uint8_t gpip_input_ = 0;
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uint8_t gpip_output_ = 0;
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uint8_t gpip_active_edge_ = 0;
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uint8_t gpip_direction_ = 0;
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uint8_t gpip_interrupt_state_ = 0;
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void reevaluate_gpip_interrupts();
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// MARK: - Interrupts
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InterruptDelegate *interrupt_delegate_ = nullptr;
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// Ad hoc documentation:
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//
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// An interrupt becomes pending if it is enabled at the time it occurs.
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//
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// If a pending interrupt is enabled in the interrupt mask, a processor
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// interrupt is generated. Otherwise no processor interrupt is generated.
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//
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// (Disabling a bit in the enabled mask also instantaneously clears anything
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// in the pending mask.)
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//
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// The user can write to the pending interrupt register; a write
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// masks whatever is there — so you can disable bits but you cannot set them.
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//
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// If the vector register's 'S' bit is set then software end-of-interrupt mode applies:
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// Acknowledgement of an interrupt clears that interrupt's pending bit, but also sets
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// its in-service bit. That bit will remain set until the user writes a zero to its position.
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// If any bits are set in the in-service register, then they will prevent lower-priority
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// interrupts from being signalled to the CPU. Further interrupts of the same or a higher
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// priority may occur.
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//
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// If the vector register's 'S' bit is clear then automatic end-of-interrupt mode applies:
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// Acknowledgement of an interrupt will automatically clear the corresponding
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// pending bit.
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//
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int interrupt_enable_ = 0;
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int interrupt_pending_ = 0;
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int interrupt_mask_ = 0;
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int interrupt_in_service_ = 0;
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bool interrupt_line_ = false;
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uint8_t interrupt_vector_ = 0;
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enum Interrupt {
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GPIP0 = (1 << 0),
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GPIP1 = (1 << 1),
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GPIP2 = (1 << 2),
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GPIP3 = (1 << 3),
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TimerD = (1 << 4),
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TimerC = (1 << 5),
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GPIP4 = (1 << 6),
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GPIP5 = (1 << 7),
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TimerB = (1 << 8),
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TransmitError = (1 << 9),
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TransmitBufferEmpty = (1 << 10),
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ReceiveError = (1 << 11),
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ReceiveBufferFull = (1 << 12),
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TimerA = (1 << 13),
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GPIP6 = (1 << 14),
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GPIP7 = (1 << 15),
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};
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void begin_interrupts(int interrupt);
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void end_interrupts(int interrupt);
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void update_interrupts();
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/// @returns the most significant bit set in v, assuming it is one of the least significant 16.
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inline static int msb16(int v) {
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// Saturate all bits below the MSB.
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v |= v >> 1;
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v |= v >> 2;
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v |= v >> 4;
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v |= v >> 8;
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// Throw away lesser bits.
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return (v+1) >> 1;
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}
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};
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}
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}
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#endif /* MFP68901_hpp */
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