This website requires JavaScript.
Explore
Mirrors
Help
Sign In
6502
/
CLK
Watch
1
Star
0
Fork
0
You've already forked CLK
mirror of
https://github.com/TomHarte/CLK.git
synced
2024-11-22 12:33:29 +00:00
Code
Issues
Projects
Releases
Wiki
Activity
8827597363
CLK
/
Machines
/
Commodore
History
Thomas Harte
8827597363
Messier and messier, but I've at least attempted to implement hardware attention acknowledge.
2016-07-08 19:00:39 -04:00
..
1540
Messier and messier, but I've at least attempted to implement hardware attention acknowledge.
2016-07-08 19:00:39 -04:00
Vic-20
Per the ROM disassembly, the Vic's VIA outputs are inverted for the benefit of the serial bus.
2016-07-07 06:57:21 -04:00
SerialBus.cpp
The inversion of truth was clearly just a problematic API. Got explicit. LineLevel might need to become more pervasive.
2016-07-07 06:44:13 -04:00
SerialBus.hpp
The inversion of truth was clearly just a problematic API. Got explicit. LineLevel might need to become more pervasive.
2016-07-07 06:44:13 -04:00