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307 lines
7.5 KiB
Plaintext
307 lines
7.5 KiB
Plaintext
//
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// ARMDecoderTests.m
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// Clock Signal
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//
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// Created by Thomas Harte on 16/02/2024.
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// Copyright 2024 Thomas Harte. All rights reserved.
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//
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#import <XCTest/XCTest.h>
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#include "../../../InstructionSets/ARM/Executor.hpp"
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#include "CSROMFetcher.hpp"
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using namespace InstructionSet::ARM;
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namespace {
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struct Memory {
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std::vector<uint8_t> rom;
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template <typename IntT>
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bool write(uint32_t address, IntT source, Mode mode, bool trans) {
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(void)mode;
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(void)trans;
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printf("W of %08x to %08x [%lu]\n", source, address, sizeof(IntT));
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if(has_moved_rom_ && address < ram_.size()) {
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*reinterpret_cast<IntT *>(&ram_[address]) = source;
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}
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return true;
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}
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template <typename IntT>
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bool read(uint32_t address, IntT &source, Mode mode, bool trans) {
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(void)mode;
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(void)trans;
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if(address >= 0x3800000) {
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has_moved_rom_ = true;
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source = *reinterpret_cast<const IntT *>(&rom[address - 0x3800000]);
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} else if(!has_moved_rom_) {
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// TODO: this is true only very transiently.
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source = *reinterpret_cast<const IntT *>(&rom[address]);
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} else if(address < ram_.size()) {
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source = *reinterpret_cast<const IntT *>(&ram_[address]);
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} else {
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source = 0;
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printf("Unknown read from %08x [%lu]\n", address, sizeof(IntT));
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}
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return true;
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}
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private:
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bool has_moved_rom_ = false;
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std::array<uint8_t, 4*1024*1024> ram_{};
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};
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}
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@interface ARMDecoderTests : XCTestCase
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@end
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@implementation ARMDecoderTests
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- (void)testBarrelShifterLogicalLeft {
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uint32_t value;
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uint32_t carry;
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// Test a shift by 1 into carry.
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value = 0x8000'0000;
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shift<ShiftType::LogicalLeft, true>(value, 1, carry);
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XCTAssertEqual(value, 0);
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XCTAssertNotEqual(carry, 0);
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// Test a shift by 18 into carry.
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value = 0x0000'4001;
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shift<ShiftType::LogicalLeft, true>(value, 18, carry);
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XCTAssertEqual(value, 0x4'0000);
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XCTAssertNotEqual(carry, 0);
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// Test a shift by 17, not generating carry.
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value = 0x0000'4001;
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shift<ShiftType::LogicalLeft, true>(value, 17, carry);
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XCTAssertEqual(value, 0x8002'0000);
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XCTAssertEqual(carry, 0);
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}
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- (void)testBarrelShifterLogicalRight {
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uint32_t value;
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uint32_t carry;
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// Test successive shifts by 4; one generating carry and one not.
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value = 0x12345678;
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shift<ShiftType::LogicalRight, true>(value, 4, carry);
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XCTAssertEqual(value, 0x1234567);
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XCTAssertNotEqual(carry, 0);
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shift<ShiftType::LogicalRight, true>(value, 4, carry);
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XCTAssertEqual(value, 0x123456);
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XCTAssertEqual(carry, 0);
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// Test shift by 1.
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value = 0x8003001;
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shift<ShiftType::LogicalRight, true>(value, 1, carry);
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XCTAssertEqual(value, 0x4001800);
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XCTAssertNotEqual(carry, 0);
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// Test a shift by greater than 32.
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value = 0xffff'ffff;
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shift<ShiftType::LogicalRight, true>(value, 33, carry);
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XCTAssertEqual(value, 0);
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XCTAssertEqual(carry, 0);
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// Test shifts by 32: result is always 0, carry is whatever was in bit 31.
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value = 0xffff'ffff;
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shift<ShiftType::LogicalRight, true>(value, 32, carry);
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XCTAssertEqual(value, 0);
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XCTAssertNotEqual(carry, 0);
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value = 0x7fff'ffff;
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shift<ShiftType::LogicalRight, true>(value, 32, carry);
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XCTAssertEqual(value, 0);
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XCTAssertEqual(carry, 0);
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// Test that a logical right shift by 0 is the same as a shift by 32.
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value = 0xffff'ffff;
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shift<ShiftType::LogicalRight, true>(value, 0, carry);
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XCTAssertEqual(value, 0);
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XCTAssertNotEqual(carry, 0);
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}
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- (void)testBarrelShifterArithmeticRight {
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uint32_t value;
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uint32_t carry;
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// Test a short negative shift.
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value = 0x8000'0030;
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shift<ShiftType::ArithmeticRight, true>(value, 1, carry);
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XCTAssertEqual(value, 0xc000'0018);
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XCTAssertEqual(carry, 0);
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// Test a medium negative shift without carry.
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value = 0xffff'0000;
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shift<ShiftType::ArithmeticRight, true>(value, 11, carry);
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XCTAssertEqual(value, 0xffff'ffe0);
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XCTAssertEqual(carry, 0);
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// Test a medium negative shift with carry.
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value = 0xffc0'0000;
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shift<ShiftType::ArithmeticRight, true>(value, 23, carry);
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XCTAssertEqual(value, 0xffff'ffff);
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XCTAssertNotEqual(carry, 0);
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// Test a long negative shift.
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value = 0x8000'0000;
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shift<ShiftType::ArithmeticRight, true>(value, 32, carry);
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XCTAssertEqual(value, 0xffff'ffff);
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XCTAssertNotEqual(carry, 0);
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// Test a positive shift.
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value = 0x0123'0031;
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shift<ShiftType::ArithmeticRight, true>(value, 3, carry);
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XCTAssertEqual(value, 0x24'6006);
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XCTAssertEqual(carry, 0);
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}
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- (void)testBarrelShifterRotateRight {
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uint32_t value;
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uint32_t carry;
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// Test a short rotate by one hex digit.
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value = 0xabcd'1234;
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shift<ShiftType::RotateRight, true>(value, 4, carry);
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XCTAssertEqual(value, 0x4abc'd123);
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XCTAssertEqual(carry, 0);
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// Test a longer rotate, with carry.
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value = 0xa5f9'6342;
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shift<ShiftType::RotateRight, true>(value, 17, carry);
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XCTAssertEqual(value, 0xb1a1'52fc);
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XCTAssertNotEqual(carry, 0);
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// Test a rotate by 32 without carry.
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value = 0x385f'7dce;
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shift<ShiftType::RotateRight, true>(value, 32, carry);
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XCTAssertEqual(value, 0x385f'7dce);
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XCTAssertEqual(carry, 0);
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// Test a rotate by 32 with carry.
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value = 0xfecd'ba12;
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shift<ShiftType::RotateRight, true>(value, 32, carry);
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XCTAssertEqual(value, 0xfecd'ba12);
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XCTAssertNotEqual(carry, 0);
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// Test a rotate through carry, carry not set.
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value = 0x123f'abcf;
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carry = 0;
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shift<ShiftType::RotateRight, true>(value, 0, carry);
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XCTAssertEqual(value, 0x091f'd5e7);
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XCTAssertNotEqual(carry, 0);
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// Test a rotate through carry, carry set.
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value = 0x123f'abce;
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carry = 1;
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shift<ShiftType::RotateRight, true>(value, 0, carry);
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XCTAssertEqual(value, 0x891f'd5e7);
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XCTAssertEqual(carry, 0);
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}
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- (void)testRegisterModes {
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Registers r;
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// Set all user mode registers to their indices.
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r.set_mode(Mode::User);
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for(int c = 0; c < 15; c++) {
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r[c] = c;
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}
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// Set FIQ registers.
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r.set_mode(Mode::FIQ);
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for(int c = 8; c < 15; c++) {
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r[c] = c | 0x100;
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}
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// Set IRQ registers.
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r.set_mode(Mode::IRQ);
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for(int c = 13; c < 15; c++) {
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r[c] = c | 0x200;
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}
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// Set supervisor registers.
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r.set_mode(Mode::FIQ);
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r.set_mode(Mode::User);
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r.set_mode(Mode::Supervisor);
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for(int c = 13; c < 15; c++) {
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r[c] = c | 0x300;
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}
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// Check all results.
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r.set_mode(Mode::User);
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r.set_mode(Mode::FIQ);
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for(int c = 0; c < 8; c++) {
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XCTAssertEqual(r[c], c);
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}
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for(int c = 8; c < 15; c++) {
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XCTAssertEqual(r[c], c | 0x100);
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}
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r.set_mode(Mode::FIQ);
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r.set_mode(Mode::IRQ);
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r.set_mode(Mode::User);
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r.set_mode(Mode::FIQ);
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r.set_mode(Mode::Supervisor);
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for(int c = 0; c < 13; c++) {
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XCTAssertEqual(r[c], c);
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}
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for(int c = 13; c < 15; c++) {
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XCTAssertEqual(r[c], c | 0x300);
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}
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r.set_mode(Mode::FIQ);
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r.set_mode(Mode::User);
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for(int c = 0; c < 15; c++) {
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XCTAssertEqual(r[c], c);
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}
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r.set_mode(Mode::Supervisor);
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r.set_mode(Mode::IRQ);
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for(int c = 0; c < 13; c++) {
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XCTAssertEqual(r[c], c);
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}
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for(int c = 13; c < 15; c++) {
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XCTAssertEqual(r[c], c | 0x200);
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}
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}
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// TODO: turn the below into a trace-driven test case.
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- (void)testROM319 {
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constexpr ROM::Name rom_name = ROM::Name::AcornRISCOS319;
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ROM::Request request(rom_name);
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const auto roms = CSROMFetcher()(request);
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auto executor = std::make_unique<Executor<Model::ARMv2, Memory>>();
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executor->bus.rom = roms.find(rom_name)->second;
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for(int c = 0; c < 1000; c++) {
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uint32_t instruction;
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executor->bus.read(executor->pc(), instruction, executor->registers().mode(), false);
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if(instruction == 0xe33ff343) {
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printf("");
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}
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printf("%08x: %08x [", executor->pc(), instruction);
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for(int c = 0; c < 15; c++) {
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printf("r%d:%08x ", c, executor->registers()[c]);
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}
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printf("psr:%08x]\n", executor->registers().status());
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execute<Model::ARMv2>(instruction, *executor);
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}
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}
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@end
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