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389 lines
11 KiB
C++
389 lines
11 KiB
C++
//
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// ZX8081.cpp
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// Clock Signal
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//
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// Created by Thomas Harte on 04/06/2017.
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// Copyright © 2017 Thomas Harte. All rights reserved.
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//
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#include "ZX8081.hpp"
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#include "../../Processors/Z80/Z80.hpp"
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#include "../../Storage/Tape/Tape.hpp"
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#include "../../Storage/Tape/Parsers/ZX8081.hpp"
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#include "../MemoryFuzzer.hpp"
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#include "../Typer.hpp"
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#include "CharacterMapper.hpp"
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#include "Video.hpp"
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#include <memory>
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namespace {
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// The clock rate is 3.25Mhz.
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const unsigned int ZX8081ClockRate = 3250000;
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}
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namespace ZX8081 {
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class ConcreteMachine:
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public Utility::TypeRecipient,
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public CPU::Z80::BusHandler,
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public Machine {
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public:
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ConcreteMachine() :
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z80_(*this),
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vsync_(false),
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hsync_(false),
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nmi_is_enabled_(false),
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tape_player_(ZX8081ClockRate),
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use_fast_tape_hack_(false),
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tape_advance_delay_(0),
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has_latched_video_byte_(false) {
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set_clock_rate(ZX8081ClockRate);
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clear_all_keys();
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}
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HalfCycles perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
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HalfCycles previous_counter = horizontal_counter_;
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horizontal_counter_ += cycle.length;
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if(previous_counter < vsync_start_ && horizontal_counter_ >= vsync_start_) {
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video_->run_for(vsync_start_ - previous_counter);
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set_hsync(true);
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line_counter_ = (line_counter_ + 1) & 7;
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if(nmi_is_enabled_) {
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z80_.set_non_maskable_interrupt_line(true);
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}
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video_->run_for(horizontal_counter_ - vsync_start_);
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} else if(previous_counter < vsync_end_ && horizontal_counter_ >= vsync_end_) {
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video_->run_for(vsync_end_ - previous_counter);
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set_hsync(false);
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if(nmi_is_enabled_) {
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z80_.set_non_maskable_interrupt_line(false);
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z80_.set_wait_line(false);
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}
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video_->run_for(horizontal_counter_ - vsync_end_);
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} else {
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video_->run_for(cycle.length);
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}
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if(is_zx81_) horizontal_counter_ %= HalfCycles(Cycles(207));
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if(!tape_advance_delay_) {
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tape_player_.run_for(cycle.length);
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} else {
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tape_advance_delay_ = std::max(tape_advance_delay_ - cycle.length, HalfCycles(0));
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}
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if(nmi_is_enabled_ && !z80_.get_halt_line() && z80_.get_non_maskable_interrupt_line()) {
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z80_.set_wait_line(true);
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}
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if(!cycle.is_terminal()) {
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return Cycles(0);
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}
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uint16_t address = cycle.address ? *cycle.address : 0;
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bool is_opcode_read = false;
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switch(cycle.operation) {
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case CPU::Z80::PartialMachineCycle::Output:
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if(!(address & 2)) nmi_is_enabled_ = false;
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if(!(address & 1)) nmi_is_enabled_ = is_zx81_;
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if(!nmi_is_enabled_) {
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// Line counter reset is held low while vsync is active; simulate that lazily by performing
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// an instant reset upon the transition from active to inactive.
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if(vsync_) line_counter_ = 0;
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set_vsync(false);
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}
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break;
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case CPU::Z80::PartialMachineCycle::Input: {
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uint8_t value = 0xff;
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if(!(address&1)) {
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if(!nmi_is_enabled_) set_vsync(true);
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uint16_t mask = 0x100;
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for(int c = 0; c < 8; c++) {
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if(!(address & mask)) value &= key_states_[c];
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mask <<= 1;
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}
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value &= ~(tape_player_.get_input() ? 0x00 : 0x80);
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}
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*cycle.value = value;
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} break;
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case CPU::Z80::PartialMachineCycle::Interrupt:
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// resetting event is M1 and IOREQ both simultaneously having leading edges;
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// that happens 2 cycles before the end of INTACK. So the timer was reset and
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// now has advanced twice.
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horizontal_counter_ = HalfCycles(2);
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*cycle.value = 0xff;
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break;
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case CPU::Z80::PartialMachineCycle::Refresh:
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// The ZX80 and 81 signal an interrupt while refresh is active and bit 6 of the refresh
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// address is low. The Z80 signals a refresh, providing the refresh address during the
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// final two cycles of an opcode fetch. Therefore communicate a transient signalling
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// of the IRQ line if necessary.
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if(!(address & 0x40)) {
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z80_.set_interrupt_line(true, Cycles(-2));
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z80_.set_interrupt_line(false);
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}
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if(has_latched_video_byte_) {
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size_t char_address = (size_t)((address & 0xfe00) | ((latched_video_byte_ & 0x3f) << 3) | line_counter_);
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uint8_t mask = (latched_video_byte_ & 0x80) ? 0x00 : 0xff;
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if(char_address < ram_base_) {
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latched_video_byte_ = rom_[char_address & rom_mask_] ^ mask;
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} else {
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latched_video_byte_ = ram_[address & ram_mask_] ^ mask;
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}
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video_->output_byte(latched_video_byte_);
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has_latched_video_byte_ = false;
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}
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break;
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case CPU::Z80::PartialMachineCycle::ReadOpcode:
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// Check for use of the fast tape hack.
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if(use_fast_tape_hack_ && address == tape_trap_address_ && tape_player_.has_tape()) {
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uint64_t prior_offset = tape_player_.get_tape()->get_offset();
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int next_byte = parser_.get_next_byte(tape_player_.get_tape());
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if(next_byte != -1) {
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uint16_t hl = z80_.get_value_of_register(CPU::Z80::Register::HL);
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ram_[hl & ram_mask_] = (uint8_t)next_byte;
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*cycle.value = 0x00;
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z80_.set_value_of_register(CPU::Z80::Register::ProgramCounter, tape_return_address_ - 1);
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// Assume that having read one byte quickly, we're probably going to be asked to read
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// another shortly. Therefore, temporarily disable the tape motor for 1000 cycles in order
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// to avoid fighting with real time. This is a stop-gap fix.
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tape_advance_delay_ = 1000;
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return 0;
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} else {
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tape_player_.get_tape()->set_offset(prior_offset);
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}
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}
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// Check for automatic tape control.
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if(use_automatic_tape_motor_control_) {
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tape_player_.set_motor_control((address >= automatic_tape_motor_start_address_) && (address < automatic_tape_motor_end_address_));
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}
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is_opcode_read = true;
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case CPU::Z80::PartialMachineCycle::Read:
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if(address < ram_base_) {
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*cycle.value = rom_[address & rom_mask_];
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} else {
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uint8_t value = ram_[address & ram_mask_];
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// If this is an M1 cycle reading from above the 32kb mark and HALT is not
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// currently active, latch for video output and return a NOP. Otherwise,
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// just return the value as read.
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if(is_opcode_read && address&0x8000 && !(value & 0x40) && !z80_.get_halt_line()) {
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latched_video_byte_ = value;
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has_latched_video_byte_ = true;
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*cycle.value = 0;
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} else *cycle.value = value;
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}
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break;
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case CPU::Z80::PartialMachineCycle::Write:
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if(address >= ram_base_) {
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ram_[address & ram_mask_] = *cycle.value;
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}
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break;
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default: break;
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}
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if(typer_) typer_->run_for(cycle.length);
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return HalfCycles(0);
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}
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void flush() {
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video_->flush();
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}
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void setup_output(float aspect_ratio) {
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video_.reset(new Video);
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}
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void close_output() {
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video_.reset();
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}
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std::shared_ptr<Outputs::CRT::CRT> get_crt() {
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return video_->get_crt();
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}
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std::shared_ptr<Outputs::Speaker> get_speaker() {
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return nullptr;
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}
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void run_for(const Cycles cycles) {
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z80_.run_for(cycles);
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}
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void configure_as_target(const StaticAnalyser::Target &target) {
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is_zx81_ = target.zx8081.isZX81;
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if(is_zx81_) {
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rom_ = zx81_rom_;
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tape_trap_address_ = 0x37c;
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tape_return_address_ = 0x380;
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vsync_start_ = HalfCycles(32);
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vsync_end_ = HalfCycles(64);
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automatic_tape_motor_start_address_ = 0x0340;
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automatic_tape_motor_end_address_ = 0x03c3;
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} else {
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rom_ = zx80_rom_;
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tape_trap_address_ = 0x220;
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tape_return_address_ = 0x248;
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vsync_start_ = HalfCycles(26);
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vsync_end_ = HalfCycles(66);
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automatic_tape_motor_start_address_ = 0x0206;
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automatic_tape_motor_end_address_ = 0x024d;
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}
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rom_mask_ = (uint16_t)(rom_.size() - 1);
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switch(target.zx8081.memory_model) {
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case StaticAnalyser::ZX8081MemoryModel::Unexpanded:
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ram_.resize(1024);
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ram_base_ = 16384;
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ram_mask_ = 1023;
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break;
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case StaticAnalyser::ZX8081MemoryModel::SixteenKB:
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ram_.resize(16384);
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ram_base_ = 16384;
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ram_mask_ = 16383;
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break;
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case StaticAnalyser::ZX8081MemoryModel::SixtyFourKB:
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ram_.resize(65536);
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ram_base_ = 8192;
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ram_mask_ = 65535;
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break;
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}
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Memory::Fuzz(ram_);
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if(target.tapes.size()) {
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tape_player_.set_tape(target.tapes.front());
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}
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if(target.loadingCommand.length()) {
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set_typer_for_string(target.loadingCommand.c_str());
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}
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}
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void set_typer_for_string(const char *string) {
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std::unique_ptr<CharacterMapper> mapper(new CharacterMapper(is_zx81_));
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Utility::TypeRecipient::set_typer_for_string(string, std::move(mapper));
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}
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void set_rom(ROMType type, std::vector<uint8_t> data) {
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switch(type) {
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case ZX80: zx80_rom_ = data; break;
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case ZX81: zx81_rom_ = data; break;
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}
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}
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#pragma mark - Keyboard
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void set_key_state(uint16_t key, bool isPressed) {
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if(isPressed)
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key_states_[key >> 8] &= (uint8_t)(~key);
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else
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key_states_[key >> 8] |= (uint8_t)key;
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}
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void clear_all_keys() {
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memset(key_states_, 0xff, 8);
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}
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#pragma mark - Tape control
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void set_use_fast_tape_hack(bool activate) {
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use_fast_tape_hack_ = activate;
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}
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void set_use_automatic_tape_motor_control(bool enabled) {
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use_automatic_tape_motor_control_ = enabled;
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if(!enabled) {
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tape_player_.set_motor_control(false);
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}
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}
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void set_tape_is_playing(bool is_playing) {
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tape_player_.set_motor_control(is_playing);
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}
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#pragma mark - Typer timing
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HalfCycles get_typer_delay() { return Cycles(7000000); }
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HalfCycles get_typer_frequency() { return Cycles(390000); }
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private:
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CPU::Z80::Processor<ConcreteMachine> z80_;
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std::shared_ptr<Video> video_;
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std::vector<uint8_t> zx81_rom_, zx80_rom_;
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uint16_t tape_trap_address_, tape_return_address_;
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uint16_t automatic_tape_motor_start_address_, automatic_tape_motor_end_address_;
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std::vector<uint8_t> ram_;
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uint16_t ram_mask_, ram_base_;
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std::vector<uint8_t> rom_;
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uint16_t rom_mask_;
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bool vsync_, hsync_;
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int line_counter_;
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uint8_t key_states_[8];
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HalfClockReceiver<Storage::Tape::BinaryTapePlayer> tape_player_;
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Storage::Tape::ZX8081::Parser parser_;
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bool is_zx81_;
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bool nmi_is_enabled_;
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HalfCycles vsync_start_, vsync_end_;
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HalfCycles horizontal_counter_;
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uint8_t latched_video_byte_;
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bool has_latched_video_byte_;
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bool use_fast_tape_hack_;
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bool use_automatic_tape_motor_control_;
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HalfCycles tape_advance_delay_;
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#pragma mark - Video
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void set_vsync(bool sync) {
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vsync_ = sync;
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update_sync();
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}
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void set_hsync(bool sync) {
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hsync_ = sync;
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update_sync();
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}
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void update_sync() {
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video_->set_sync(vsync_ || hsync_);
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}
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};
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}
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using namespace ZX8081;
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// See header; constructs and returns an instance of the ZX80/81.
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Machine *Machine::ZX8081() {
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return new ZX8081::ConcreteMachine;
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}
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Machine::~Machine() {}
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