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3293ab48ce
This shouldn't matter since these operations are not requested by the state machine but this is what those operations should do according to Understanding the Apple II, Table 9.3, page 9-15.
308 lines
11 KiB
C++
308 lines
11 KiB
C++
//
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// DiskII.cpp
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// Clock Signal
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//
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// Created by Thomas Harte on 20/04/2018.
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// Copyright 2018 Thomas Harte. All rights reserved.
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//
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#include "DiskII.hpp"
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#include <cstdio>
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#include <cstring>
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using namespace Apple;
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namespace {
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const uint8_t input_command = 0x4; // i.e. Q6
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const uint8_t input_mode = 0x8; // i.e. Q7
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const uint8_t input_flux = 0x1;
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}
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DiskII::DiskII(int clock_rate) :
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clock_rate_(clock_rate),
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inputs_(input_command),
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drives_{
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Storage::Disk::Drive{clock_rate, 300, 1},
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Storage::Disk::Drive{clock_rate, 300, 1}
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}
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{
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drives_[0].set_clocking_hint_observer(this);
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drives_[1].set_clocking_hint_observer(this);
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drives_[active_drive_].set_event_delegate(this);
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}
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void DiskII::set_control(Control control, bool on) {
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int previous_stepper_mask = stepper_mask_;
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switch(control) {
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case Control::P0: stepper_mask_ = (stepper_mask_ & 0xe) | (on ? 0x1 : 0x0); break;
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case Control::P1: stepper_mask_ = (stepper_mask_ & 0xd) | (on ? 0x2 : 0x0); break;
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case Control::P2: stepper_mask_ = (stepper_mask_ & 0xb) | (on ? 0x4 : 0x0); break;
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case Control::P3: stepper_mask_ = (stepper_mask_ & 0x7) | (on ? 0x8 : 0x0); break;
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case Control::Motor:
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motor_is_enabled_ = on;
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drives_[active_drive_].set_motor_on(on);
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return;
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}
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// If the stepper magnet selections have changed, and any is on, see how
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// that moves the head.
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if(previous_stepper_mask ^ stepper_mask_ && stepper_mask_) {
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// Convert from a representation of bits set to the centre of pull.
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int direction = 0;
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if(stepper_mask_&1) direction += (((stepper_position_ - 0) + 4)&7) - 4;
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if(stepper_mask_&2) direction += (((stepper_position_ - 2) + 4)&7) - 4;
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if(stepper_mask_&4) direction += (((stepper_position_ - 4) + 4)&7) - 4;
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if(stepper_mask_&8) direction += (((stepper_position_ - 6) + 4)&7) - 4;
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const int bits_set = (stepper_mask_&1) + ((stepper_mask_ >> 1)&1) + ((stepper_mask_ >> 2)&1) + ((stepper_mask_ >> 3)&1);
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direction /= bits_set;
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// Compare to the stepper position to decide whether that pulls in the current cog notch,
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// or grabs a later one.
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drives_[active_drive_].step(Storage::Disk::HeadPosition(-direction, 4));
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stepper_position_ = (stepper_position_ - direction + 8) & 7;
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}
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}
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void DiskII::select_drive(int drive) {
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if((drive&1) == active_drive_) return;
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drives_[active_drive_].set_event_delegate(this);
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drives_[active_drive_^1].set_event_delegate(nullptr);
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drives_[active_drive_].set_motor_on(false);
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active_drive_ = drive & 1;
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drives_[active_drive_].set_motor_on(motor_is_enabled_);
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}
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// The read pulse is controlled by a special IC that outputs a 1us pulse for every field reversal on the disk.
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void DiskII::run_for(const Cycles cycles) {
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if(preferred_clocking() == ClockingHint::Preference::None) return;
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auto integer_cycles = cycles.as_integral();
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while(integer_cycles--) {
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const int address = (state_ & 0xf0) | inputs_ | ((shift_register_&0x80) >> 6);
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if(flux_duration_) {
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--flux_duration_;
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if(!flux_duration_) inputs_ |= input_flux;
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}
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state_ = state_machine_[size_t(address)];
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switch(state_ & 0xf) {
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default: shift_register_ = 0; break; // clear
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case 0x8:
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case 0xc: break; // nop
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case 0x9: shift_register_ = uint8_t(shift_register_ << 1); break; // shift left, bringing in a zero
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case 0xd: shift_register_ = uint8_t((shift_register_ << 1) | 1); break; // shift left, bringing in a one
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case 0xa:
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case 0xe: // shift right, bringing in write protected status
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shift_register_ = (shift_register_ >> 1) | (is_write_protected() ? 0x80 : 0x00);
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// If the controller is in the sense write protect loop but the register will never change,
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// short circuit further work and return now.
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if(shift_register_ == (is_write_protected() ? 0xff : 0x00)) {
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if(!drive_is_sleeping_[0]) drives_[0].run_for(Cycles(integer_cycles));
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if(!drive_is_sleeping_[1]) drives_[1].run_for(Cycles(integer_cycles));
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decide_clocking_preference();
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return;
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}
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break;
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case 0xb:
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case 0xf: shift_register_ = data_input_; break; // load data register from data bus
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}
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// Currently writing?
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if(inputs_&input_mode) {
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// state_ & 0x80 should be the current level sent to the disk;
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// therefore transitions in that bit should become flux transitions
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drives_[active_drive_].write_bit(!!((state_ ^ address) & 0x80));
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}
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// TODO: surely there's a less heavyweight solution than inline updates?
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if(!drive_is_sleeping_[0]) drives_[0].run_for(Cycles(1));
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if(!drive_is_sleeping_[1]) drives_[1].run_for(Cycles(1));
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}
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// Per comp.sys.apple2.programmer there is a delay between the controller
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// motor switch being flipped and the drive motor actually switching off.
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// This models that, accepting overrun as a risk.
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if(motor_off_time_ >= 0) {
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motor_off_time_ -= cycles.as_integral();
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if(motor_off_time_ < 0) {
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set_control(Control::Motor, false);
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}
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}
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decide_clocking_preference();
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}
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void DiskII::decide_clocking_preference() {
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ClockingHint::Preference prior_preference = clocking_preference_;
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// If in read mode, clocking is either:
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//
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// just-in-time, if drives are running or the shift register has any 1s in it and shifting may occur, or a flux event hasn't yet passed; or
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// none, given that drives are not running, the shift register has already emptied or stopped and there's no flux about to be received.
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if(!(inputs_ & ~input_flux)) {
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const bool is_stuck_at_nop =
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!flux_duration_ && state_machine_[(state_ & 0xf0) | inputs_ | ((shift_register_&0x80) >> 6)] == state_ && (state_ &0xf) == 0x8;
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clocking_preference_ =
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(drive_is_sleeping_[0] && drive_is_sleeping_[1] && (!shift_register_ || is_stuck_at_nop) && (inputs_&input_flux))
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? ClockingHint::Preference::None : ClockingHint::Preference::JustInTime;
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}
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// If in writing mode, clocking is real time.
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if(inputs_ & input_mode) {
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clocking_preference_ = ClockingHint::Preference::RealTime;
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}
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// If in sense-write-protect mode, clocking is just-in-time if the shift register hasn't yet filled with the value that
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// corresponds to the current write protect status. Otherwise it is none.
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if((inputs_ & ~input_flux) == input_command) {
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clocking_preference_ = (shift_register_ == (is_write_protected() ? 0xff : 0x00)) ? ClockingHint::Preference::None : ClockingHint::Preference::JustInTime;
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}
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// Announce a change if there was one.
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if(prior_preference != clocking_preference_)
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update_clocking_observer();
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}
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bool DiskII::is_write_protected() {
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return !!(stepper_mask_ & 2) | drives_[active_drive_].get_is_read_only();
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}
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void DiskII::set_state_machine(const std::vector<uint8_t> &state_machine) {
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/*
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An unadulterated P6 ROM read returns values with an address formed as:
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state b0, state b2, state b3, pulse, Q7, Q6, shift, state b1
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... and has the top nibble of each value stored in the ROM reflected.
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Beneath Apple Pro-DOS uses a different order and several of the
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online copies are reformatted into that order.
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So the code below remaps into Beneath Apple Pro-DOS order if the
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supplied state machine isn't already in that order.
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*/
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if(state_machine[0] != 0x18) {
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for(size_t source_address = 0; source_address < 256; ++source_address) {
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// Remap into Beneath Apple Pro-DOS address form.
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const size_t destination_address =
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((source_address&0x20) ? 0x80 : 0x00) |
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((source_address&0x40) ? 0x40 : 0x00) |
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((source_address&0x01) ? 0x20 : 0x00) |
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((source_address&0x80) ? 0x10 : 0x00) |
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((source_address&0x08) ? 0x08 : 0x00) |
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((source_address&0x04) ? 0x04 : 0x00) |
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((source_address&0x02) ? 0x02 : 0x00) |
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((source_address&0x10) ? 0x01 : 0x00);
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// Store.
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const uint8_t source_value = state_machine[source_address];
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state_machine_[destination_address] =
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((source_value & 0x80) ? 0x10 : 0x0) |
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((source_value & 0x40) ? 0x20 : 0x0) |
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((source_value & 0x20) ? 0x40 : 0x0) |
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((source_value & 0x10) ? 0x80 : 0x0) |
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(source_value & 0x0f);
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}
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} else {
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for(size_t source_address = 0; source_address < 256; ++source_address) {
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// Reshuffle ordering of bytes only, to retain indexing by the high nibble.
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const size_t destination_address =
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((source_address&0x80) ? 0x80 : 0x00) |
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((source_address&0x40) ? 0x40 : 0x00) |
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((source_address&0x01) ? 0x20 : 0x00) |
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((source_address&0x20) ? 0x10 : 0x00) |
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((source_address&0x08) ? 0x08 : 0x00) |
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((source_address&0x04) ? 0x04 : 0x00) |
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((source_address&0x02) ? 0x02 : 0x00) |
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((source_address&0x10) ? 0x01 : 0x00);
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state_machine_[destination_address] = state_machine[source_address];
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}
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}
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}
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void DiskII::set_disk(const std::shared_ptr<Storage::Disk::Disk> &disk, int drive) {
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drives_[drive].set_disk(disk);
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}
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void DiskII::process_event(const Storage::Disk::Drive::Event &event) {
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if(event.type == Storage::Disk::Track::Event::FluxTransition) {
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inputs_ &= ~input_flux;
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flux_duration_ = 2; // Upon detection of a flux transition, the flux flag should stay set for 1us. Emulate that as two cycles.
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decide_clocking_preference();
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}
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}
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void DiskII::set_component_prefers_clocking(ClockingHint::Source *, ClockingHint::Preference) {
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drive_is_sleeping_[0] = drives_[0].preferred_clocking() == ClockingHint::Preference::None;
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drive_is_sleeping_[1] = drives_[1].preferred_clocking() == ClockingHint::Preference::None;
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decide_clocking_preference();
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}
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ClockingHint::Preference DiskII::preferred_clocking() const {
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return clocking_preference_;
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}
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void DiskII::set_data_input(uint8_t input) {
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data_input_ = input;
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}
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int DiskII::read_address(int address) {
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switch(address & 0xf) {
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default:
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case 0x0: set_control(Control::P0, false); break;
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case 0x1: set_control(Control::P0, true); break;
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case 0x2: set_control(Control::P1, false); break;
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case 0x3: set_control(Control::P1, true); break;
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case 0x4: set_control(Control::P2, false); break;
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case 0x5: set_control(Control::P2, true); break;
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case 0x6: set_control(Control::P3, false); break;
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case 0x7: set_control(Control::P3, true); break;
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case 0x8:
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shift_register_ = 0;
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motor_off_time_ = clock_rate_;
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break;
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case 0x9:
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set_control(Control::Motor, true);
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motor_off_time_ = -1;
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break;
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case 0xa: select_drive(0); break;
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case 0xb: select_drive(1); break;
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case 0xc: inputs_ &= ~input_command; break;
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case 0xd: inputs_ |= input_command; break;
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case 0xe:
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if(inputs_ & input_mode)
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drives_[active_drive_].end_writing();
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inputs_ &= ~input_mode;
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break;
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case 0xf:
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if(!(inputs_ & input_mode))
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drives_[active_drive_].begin_writing(Storage::Time(1, int(clock_rate_)), false);
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inputs_ |= input_mode;
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break;
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}
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decide_clocking_preference();
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return (address & 1) ? 0xff : shift_register_;
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}
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void DiskII::set_activity_observer(Activity::Observer *observer) {
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drives_[0].set_activity_observer(observer, "Drive 1", true);
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drives_[1].set_activity_observer(observer, "Drive 2", true);
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}
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Storage::Disk::Drive &DiskII::get_drive(int index) {
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return drives_[index];
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}
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