This website requires JavaScript.
Explore
Mirrors
Help
Sign In
6502
/
CLK
Watch
1
Star
0
Fork
0
You've already forked CLK
mirror of
https://github.com/TomHarte/CLK.git
synced
2024-11-22 12:33:29 +00:00
Code
Issues
Projects
Releases
Wiki
Activity
988bbb5ab1
CLK
/
Machines
/
Oric
History
Thomas Harte
988bbb5ab1
Ensured AY registers aren't rewritten just because of a synchronise event. A stall prior to figuring out proper bus logic, clearly.
2016-10-17 08:05:57 -04:00
..
Oric.cpp
Oric.hpp
Ensured AY registers aren't rewritten just because of a synchronise event. A stall prior to figuring out proper bus logic, clearly.
2016-10-17 08:05:57 -04:00
Video.cpp
Altered phase so that it now merely accounts for accumulated error across a frame. Can probably do better.
2016-10-17 08:04:15 -04:00
Video.hpp
Fixed inverse characters, added an extra per-frame phase change, based on empirical observation, ensured header guard won't become ambiguous.
2016-10-16 22:14:01 -04:00