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337 lines
14 KiB
Plaintext
337 lines
14 KiB
Plaintext
//
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// x86DecoderTests.m
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// Clock Signal
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//
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// Created by Thomas Harte on 03/01/2021.
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// Copyright 2021 Thomas Harte. All rights reserved.
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//
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#import <XCTest/XCTest.h>
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#include <initializer_list>
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#include <vector>
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#include "../../../InstructionSets/x86/Decoder.hpp"
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namespace {
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using Operation = CPU::Decoder::x86::Operation;
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using Instruction = CPU::Decoder::x86::Instruction;
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using Source = CPU::Decoder::x86::Source;
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using Size = CPU::Decoder::x86::Size;
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}
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@interface x86DecoderTests : XCTestCase
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@end
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/*!
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Tests 8086 decoding by throwing a bunch of randomly-generated
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word streams and checking that the result matches what I got from a
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disassembler elsewhere.
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*/
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@implementation x86DecoderTests {
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std::vector<Instruction> instructions;
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}
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// MARK: - Specific instruction asserts.
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- (void)assert:(Instruction &)instruction operation:(Operation)operation {
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XCTAssertEqual(instruction.operation, operation);
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}
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- (void)assert:(Instruction &)instruction operation:(Operation)operation size:(int)size {
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XCTAssertEqual(instruction.operation, operation);
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XCTAssertEqual(instruction.operation_size(), CPU::Decoder::x86::Size(size));
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}
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- (void)assert:(Instruction &)instruction operation:(Operation)operation size:(int)size source:(Source)source destination:(Source)destination displacement:(int16_t)displacement {
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XCTAssertEqual(instruction.operation, operation);
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XCTAssertEqual(instruction.operation_size(), CPU::Decoder::x86::Size(size));
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XCTAssertEqual(instruction.source(), source);
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XCTAssertEqual(instruction.destination(), destination);
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XCTAssertEqual(instruction.displacement(), displacement);
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}
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- (void)assert:(Instruction &)instruction operation:(Operation)operation size:(int)size source:(Source)source destination:(Source)destination displacement:(int16_t)displacement operand:(uint16_t)operand {
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[self assert:instruction operation:operation size:size source:source destination:destination displacement:displacement];
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XCTAssertEqual(instruction.operand(), operand);
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}
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- (void)assert:(Instruction &)instruction operation:(Operation)operation size:(int)size source:(Source)source destination:(Source)destination operand:(uint16_t)operand {
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[self assert:instruction operation:operation size:size source:source destination:destination displacement:0 operand:operand];
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}
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- (void)assert:(Instruction &)instruction operation:(Operation)operation size:(int)size source:(Source)source destination:(Source)destination {
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[self assert:instruction operation:operation size:size source:source destination:destination displacement:0];
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}
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- (void)assert:(Instruction &)instruction operation:(Operation)operation size:(int)size source:(Source)source {
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XCTAssertEqual(instruction.operation, operation);
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XCTAssertEqual(instruction.operation_size(), CPU::Decoder::x86::Size(size));
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XCTAssertEqual(instruction.source(), source);
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}
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- (void)assert:(Instruction &)instruction operation:(Operation)operation size:(int)size destination:(Source)destination {
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XCTAssertEqual(instruction.operation, operation);
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XCTAssertEqual(instruction.operation_size(), CPU::Decoder::x86::Size(size));
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XCTAssertEqual(instruction.destination(), destination);
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}
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- (void)assert:(Instruction &)instruction operation:(Operation)operation size:(int)size operand:(uint16_t)operand destination:(Source)destination {
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XCTAssertEqual(instruction.operation, operation);
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XCTAssertEqual(instruction.operation_size(), CPU::Decoder::x86::Size(size));
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XCTAssertEqual(instruction.destination(), destination);
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XCTAssertEqual(instruction.source(), Source::Immediate);
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XCTAssertEqual(instruction.operand(), operand);
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XCTAssertEqual(instruction.displacement(), 0);
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}
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- (void)assert:(Instruction &)instruction operation:(Operation)operation displacement:(int16_t)displacement {
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XCTAssertEqual(instruction.operation, operation);
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XCTAssertEqual(instruction.displacement(), displacement);
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}
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- (void)assert:(Instruction &)instruction operation:(Operation)operation operand:(uint16_t)operand {
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XCTAssertEqual(instruction.operation, operation);
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XCTAssertEqual(instruction.operand(), operand);
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XCTAssertEqual(instruction.displacement(), 0);
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}
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- (void)assert:(Instruction &)instruction operation:(Operation)operation segment:(uint16_t)segment offset:(uint16_t)offset {
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XCTAssertEqual(instruction.operation, operation);
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XCTAssertEqual(instruction.segment(), segment);
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XCTAssertEqual(instruction.offset(), offset);
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}
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// MARK: - Decoder
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- (void)decode:(const std::initializer_list<uint8_t> &)stream {
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// Decode by offering up all data at once.
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CPU::Decoder::x86::Decoder decoder(CPU::Decoder::x86::Model::i8086);
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instructions.clear();
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const uint8_t *byte = stream.begin();
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while(byte != stream.end()) {
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const auto [size, next] = decoder.decode(byte, stream.end() - byte);
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if(size <= 0) break;
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instructions.push_back(next);
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byte += size;
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}
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// Grab a byte-at-a-time decoding and check that it matches the previous.
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{
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CPU::Decoder::x86::Decoder decoder(CPU::Decoder::x86::Model::i8086);
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auto previous_instruction = instructions.begin();
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for(auto item: stream) {
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const auto [size, next] = decoder.decode(&item, 1);
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if(size > 0) {
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XCTAssert(next == *previous_instruction);
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++previous_instruction;
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}
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}
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}
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}
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// MARK: - Tests
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- (void)testSequence1 {
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// Sequences the Online Disassembler believes to exist but The 8086 Book does not:
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//
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// 0x6a 0x65 push $65
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// 0x65 0x6d gs insw (%dx),%es:(%di)
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// 0x67 0x61 addr32 popa
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// 0x6c insb (%dx), %es:(%di)
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// 0xc9 leave
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//
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[self decode:{
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0x2d, 0x77, 0xea, 0x72, 0xfc, 0x4b, 0xb5, 0x28, 0xc3, 0xca, 0x26, 0x48, /* 0x65, 0x6d, */ 0x7b, 0x9f,
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0xc2, 0x65, 0x42, 0x4e, 0xef, 0x70, 0x20, 0x94, 0xc4, 0xd4, 0x93, 0x43, 0x3c, 0x8e, /* 0x6a, 0x65, */
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0x1a, 0x78, 0x45, 0x10, 0x7f, 0x3c, 0x19, 0x5a, 0x16, 0x31, 0x64, 0x2c, 0xe7, 0xc6, 0x7d, 0xb0,
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0xb5, 0x49, /* 0x67, 0x61, */ 0xba, 0xc0, 0xcb, 0x14, 0x7e, 0x71, 0xd0, 0x50, 0x78, 0x3d, 0x03, 0x1d,
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0xe5, 0xc9, 0x97, 0xc3, 0x9b, 0xe6, 0xd3, /* 0x6c, */ 0x58, 0x4d, 0x76, 0x80, 0x44, 0xd6, 0x9f, 0xa5,
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0xbd, 0xa1, 0x12, 0xc5, 0x29, /* 0xc9, */ 0x9e, 0xd8, 0xf3, 0xcf, 0x92, 0x39, 0x5d, 0x90, 0x15, 0xc3,
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0xb8, 0xad, 0xe8, 0xc8, 0x16, 0x4a, 0xb0, 0x9e, 0xf9, 0xbf, 0x56, 0xea, 0x4e, 0xfd, 0xe4, 0x5a,
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0x23, 0xaa, 0x2c, 0x5b, 0x2a, 0xd2, 0xf7, 0x5f, 0x18, 0x86, 0x90, 0x25, 0x64, 0xb7, 0xc3
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}];
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// 63 instructions are expected.
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XCTAssertEqual(instructions.size(), 63);
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// sub $0xea77,%ax
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// jb 0x00000001
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// dec %bx
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// mov $0x28,%ch
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[self assert:instructions[0] operation:Operation::SUB size:2 operand:0xea77 destination:Source::AX];
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[self assert:instructions[1] operation:Operation::JB displacement:0xfffc];
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[self assert:instructions[2] operation:Operation::DEC size:2 source:Source::BX destination:Source::BX];
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[self assert:instructions[3] operation:Operation::MOV size:1 operand:0x28 destination:Source::CH];
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// ret
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// lret $0x4826
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// [[ omitted: gs insw (%dx),%es:(%di) ]]
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// jnp 0xffffffaf
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// ret $0x4265
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[self assert:instructions[4] operation:Operation::RETN];
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[self assert:instructions[5] operation:Operation::RETF operand:0x4826];
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[self assert:instructions[6] operation:Operation::JNP displacement:0xff9f];
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[self assert:instructions[7] operation:Operation::RETN operand:0x4265];
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// dec %si
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// out %ax,(%dx)
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// jo 0x00000037
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// xchg %ax,%sp
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[self assert:instructions[8] operation:Operation::DEC size:2 source:Source::SI destination:Source::SI];
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[self assert:instructions[9] operation:Operation::OUT size:2 source:Source::AX destination:Source::DX];
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[self assert:instructions[10] operation:Operation::JO displacement:0x20];
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[self assert:instructions[11] operation:Operation::XCHG size:2 source:Source::AX destination:Source::SP];
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// ODA has:
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// c4 (bad)
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// d4 93 aam $0x93
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//
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// That assumes that upon discovering that the d4 doesn't make a valid LES,
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// it can become an instruction byte. I'm not persuaded. So I'm taking:
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//
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// c4 d4 (bad)
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// 93 XCHG AX, BX
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[self assert:instructions[12] operation:Operation::Invalid];
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[self assert:instructions[13] operation:Operation::XCHG size:2 source:Source::AX destination:Source::BX];
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// inc %bx
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// cmp $0x8e,%al
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// [[ omitted: push $0x65 ]]
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// sbb 0x45(%bx,%si),%bh
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// adc %bh,0x3c(%bx)
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[self assert:instructions[14] operation:Operation::INC size:2 source:Source::BX destination:Source::BX];
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[self assert:instructions[15] operation:Operation::CMP size:1 operand:0x8e destination:Source::AL];
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[self assert:instructions[16] operation:Operation::SBB size:1 source:Source::IndBXPlusSI destination:Source::BH displacement:0x45];
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[self assert:instructions[17] operation:Operation::ADC size:1 source:Source::BH destination:Source::IndBX displacement:0x3c];
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// sbb %bx,0x16(%bp,%si)
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// xor %sp,0x2c(%si)
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// out %ax,$0xc6
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// jge 0xffffffe0
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[self assert:instructions[18] operation:Operation::SBB size:2 source:Source::BX destination:Source::IndBPPlusSI displacement:0x16];
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[self assert:instructions[19] operation:Operation::XOR size:2 source:Source::SP destination:Source::IndSI displacement:0x2c];
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[self assert:instructions[20] operation:Operation::OUT size:2 source:Source::AX destination:Source::DirectAddress operand:0xc6];
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[self assert:instructions[21] operation:Operation::JNL displacement:0xffb0];
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// mov $0x49,%ch
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// [[ omitted: addr32 popa ]]
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// mov $0xcbc0,%dx
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// adc $0x7e,%al
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// jno 0x0000000b
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[self assert:instructions[22] operation:Operation::MOV size:1 operand:0x49 destination:Source::CH];
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[self assert:instructions[23] operation:Operation::MOV size:2 operand:0xcbc0 destination:Source::DX];
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[self assert:instructions[24] operation:Operation::ADC size:1 operand:0x7e destination:Source::AL];
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[self assert:instructions[25] operation:Operation::JNO displacement:0xffd0];
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// push %ax
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// js 0x0000007b
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// add (%di),%bx
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// in $0xc9,%ax
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[self assert:instructions[26] operation:Operation::PUSH size:2 source:Source::AX];
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[self assert:instructions[27] operation:Operation::JS displacement:0x3d];
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[self assert:instructions[28] operation:Operation::ADD size:2 source:Source::IndDI destination:Source::BX];
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[self assert:instructions[29] operation:Operation::IN size:2 source:Source::DirectAddress destination:Source::AX operand:0xc9];
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// xchg %ax,%di
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// ret
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// fwait
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// out %al,$0xd3
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[self assert:instructions[30] operation:Operation::XCHG size:2 source:Source::AX destination:Source::DI];
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[self assert:instructions[31] operation:Operation::RETN];
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[self assert:instructions[32] operation:Operation::WAIT];
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[self assert:instructions[33] operation:Operation::OUT size:1 source:Source::AL destination:Source::DirectAddress operand:0xd3];
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// [[ omitted: insb (%dx),%es:(%di) ]]
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// pop %ax
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// dec %bp
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// jbe 0xffffffcc
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// inc %sp
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[self assert:instructions[34] operation:Operation::POP size:2 destination:Source::AX];
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[self assert:instructions[35] operation:Operation::DEC size:2 source:Source::BP destination:Source::BP];
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[self assert:instructions[36] operation:Operation::JBE displacement:0xff80];
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[self assert:instructions[37] operation:Operation::INC size:2 source:Source::SP destination:Source::SP];
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// (bad)
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// lahf
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// movsw %ds:(%si),%es:(%di)
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// mov $0x12a1,%bp
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[self assert:instructions[38] operation:Operation::Invalid];
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[self assert:instructions[39] operation:Operation::LAHF];
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[self assert:instructions[40] operation:Operation::MOVS size:2];
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[self assert:instructions[41] operation:Operation::MOV size:2 operand:0x12a1 destination:Source::BP];
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// lds (%bx,%di),%bp
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// [[ omitted: leave ]]
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// sahf
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// fdiv %st(3),%st
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// iret
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[self assert:instructions[42] operation:Operation::LDS size:2];
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[self assert:instructions[43] operation:Operation::SAHF];
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[self assert:instructions[44] operation:Operation::ESC];
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[self assert:instructions[45] operation:Operation::IRET];
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// xchg %ax,%dx
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// cmp %bx,-0x70(%di)
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// adc $0xb8c3,%ax
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// lods %ds:(%si),%ax
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[self assert:instructions[46] operation:Operation::XCHG size:2 source:Source::AX destination:Source::DX];
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[self assert:instructions[47] operation:Operation::CMP size:2 source:Source::BX destination:Source::IndDI displacement:0xff90];
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[self assert:instructions[48] operation:Operation::ADC size:2 operand:0xb8c3 destination:Source::AX];
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[self assert:instructions[49] operation:Operation::LODS size:2];
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// call 0x0000172d
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// dec %dx
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// mov $0x9e,%al
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// stc
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[self assert:instructions[50] operation:Operation::CALLD operand:0x16c8];
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[self assert:instructions[51] operation:Operation::DEC size:2 source:Source::DX destination:Source::DX];
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[self assert:instructions[52] operation:Operation::MOV size:1 operand:0x9e destination:Source::AL];
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[self assert:instructions[53] operation:Operation::STC];
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// mov $0xea56,%di
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// dec %si
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// std
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// in $0x5a,%al
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[self assert:instructions[54] operation:Operation::MOV size:2 operand:0xea56 destination:Source::DI];
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[self assert:instructions[55] operation:Operation::DEC size:2 source:Source::SI destination:Source::SI];
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[self assert:instructions[56] operation:Operation::STD];
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[self assert:instructions[57] operation:Operation::IN size:1 source:Source::DirectAddress destination:Source::AL operand:0x5a];
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// and 0x5b2c(%bp,%si),%bp
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// sub %dl,%dl
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// negw 0x18(%bx)
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// xchg %dl,0x6425(%bx,%si)
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[self assert:instructions[58] operation:Operation::AND size:2 source:Source::IndBPPlusSI destination:Source::BP displacement:0x5b2c];
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[self assert:instructions[59] operation:Operation::SUB size:1 source:Source::DL destination:Source::DL];
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[self assert:instructions[60] operation:Operation::NEG size:2 source:Source::IndBX destination:Source::IndBX displacement:0x18];
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[self assert:instructions[61] operation:Operation::XCHG size:1 source:Source::IndBXPlusSI destination:Source::DL displacement:0x6425];
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// mov $0xc3,%bh
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[self assert:instructions[62] operation:Operation::MOV size:1 operand:0xc3 destination:Source::BH];
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}
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- (void)test83 {
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[self decode:{
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0x83, 0x10, 0x80, // adcw $0xff80,(%bx,%si)
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0x83, 0x3b, 0x04, // cmpw $0x4,(%bp,%di)
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0x83, 0x2f, 0x09, // subw $0x9,(%bx)
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}];
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XCTAssertEqual(instructions.size(), 3);
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[self assert:instructions[0] operation:Operation::ADC size:2 source:Source::Immediate destination:Source::IndBXPlusSI operand:0xff80];
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[self assert:instructions[1] operation:Operation::CMP size:2 source:Source::Immediate destination:Source::IndBPPlusDI operand:0x4];
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[self assert:instructions[2] operation:Operation::SUB size:2 source:Source::Immediate destination:Source::IndBX operand:0x9];
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}
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- (void)testFar {
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[self decode:{
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0x9a, 0x12, 0x34, 0x56, 0x78, // lcall 0x7856, 0x3412
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}];
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XCTAssertEqual(instructions.size(), 1);
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[self assert:instructions[0] operation:Operation::CALLF segment:0x7856 offset:0x3412];
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}
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@end
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