Thomas Harte b9dbb6bcf8 Discovered my timing error: the I/R <-> A loads should take an extra cycle. This means the ZX80 now finally takes the correct 207 cycles per line. Fixed the video output wave to be clocked at the appropriate rate.		2017-06-12 18:55:04 -04:00
..
Z80.cpp	First tentative steps towards adding a Z80 implementation.	2017-05-14 17:46:41 -04:00
Z80.hpp	Discovered my timing error: the I/R <-> A loads should take an extra cycle. This means the ZX80 now finally takes the correct 207 cycles per line. Fixed the video output wave to be clocked at the appropriate rate.	2017-06-12 18:55:04 -04:00
Z80AllRAM.cpp	Added a test to confirm interrupts are disabled, and a response to the interrupt cycle within the all-RAM machine.	2017-06-03 17:53:44 -04:00
Z80AllRAM.hpp	Plumbed through to allow interrupt tests, wrote an NMI test, corrected the error revealed.	2017-06-03 17:41:45 -04:00