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mirror of https://github.com/TomHarte/CLK.git synced 2024-09-30 22:56:03 +00:00
CLK/Components
2023-01-16 22:31:03 -05:00
..
1770
5380 Continue DMA requests if writing, even after a phase mismatch. 2022-09-15 16:46:22 -04:00
6522
6526
6532
6560 Switch name back to emphasise _async_. 2022-07-16 14:41:04 -04:00
6845
6850
8255
8272
8530
9918 Eliminate hard-coded assumption of 16kb. 2023-01-10 12:38:19 -05:00
68901 Fix include order. 2023-01-14 14:16:56 -05:00
AppleClock
AudioToggle Switch name back to emphasise _async_. 2022-07-16 14:41:04 -04:00
AY38910 Switch name back to emphasise _async_. 2022-07-16 14:41:04 -04:00
DiskII
KonamiSCC Switch name back to emphasise _async_. 2022-07-16 14:41:04 -04:00
OPx Switch name back to emphasise _async_. 2022-07-16 14:41:04 -04:00
RP5C01 Implement the easy writes. 2023-01-16 22:31:03 -05:00
Serial
SN76489 Switch name back to emphasise _async_. 2022-07-16 14:41:04 -04:00