mirror of
https://github.com/TomHarte/CLK.git
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b9c2c42bc0
Hopefully to eliminate a lot of unnecessary `Time` work; inaccuracies should still be within tolerable range.
131 lines
3.4 KiB
C++
131 lines
3.4 KiB
C++
//
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// DiskII.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 20/04/2018.
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// Copyright 2018 Thomas Harte. All rights reserved.
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//
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#ifndef DiskII_hpp
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#define DiskII_hpp
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#include "../../ClockReceiver/ClockReceiver.hpp"
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#include "../../ClockReceiver/ClockingHintSource.hpp"
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#include "../../Storage/Disk/Disk.hpp"
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#include "../../Storage/Disk/Drive.hpp"
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#include "../../Activity/Observer.hpp"
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#include <array>
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#include <cstdint>
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#include <vector>
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namespace Apple {
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/*!
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Provides an emulation of the Apple Disk II.
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*/
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class DiskII:
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public Storage::Disk::Drive::EventDelegate,
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public ClockingHint::Source,
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public ClockingHint::Observer {
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public:
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DiskII(int clock_rate);
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/// Sets the current external value of the data bus.
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void set_data_input(uint8_t input);
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/*!
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Submits an access to address @c address.
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@returns The 8-bit value loaded to the data bus by the DiskII if any;
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@c DidNotLoad otherwise.
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*/
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int read_address(int address);
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/*!
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The value returned by @c read_address if accessing that address
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didn't cause the disk II to place anything onto the bus.
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*/
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const int DidNotLoad = -1;
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/// Advances the controller by @c cycles.
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void run_for(const Cycles cycles);
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/*!
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Supplies the image of the state machine (i.e. P6) ROM,
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which dictates how the Disk II will respond to input.
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To reduce processing costs, some assumptions are made by
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the implementation as to the content of this ROM.
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Including:
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* If Q6 is set and Q7 is reset, the controller is testing
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for write protect. If and when the shift register has
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become full with the state of the write protect value,
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no further processing is required.
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* If both Q6 and Q7 are reset, the drive motor is disabled,
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and the shift register is all zeroes, no further processing
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is required.
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*/
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void set_state_machine(const std::vector<uint8_t> &);
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/// Inserts @c disk into the drive @c drive.
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void set_disk(const std::shared_ptr<Storage::Disk::Disk> &disk, int drive);
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// As per Sleeper.
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ClockingHint::Preference preferred_clocking() override;
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// The Disk II functions as a potential target for @c Activity::Sources.
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void set_activity_observer(Activity::Observer *observer);
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// Returns the Storage::Disk::Drive in use for drive @c index.
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// *NOT FOR HARDWARE EMULATION USAGE*.
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Storage::Disk::Drive &get_drive(int index);
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private:
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enum class Control {
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P0, P1, P2, P3,
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Motor,
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};
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enum class Mode {
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Read, Write
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};
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void set_control(Control control, bool on);
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void set_mode(Mode mode);
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void select_drive(int drive);
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uint8_t trigger_address(int address, uint8_t value);
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void process_event(const Storage::Disk::Drive::Event &event) override;
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void set_component_prefers_clocking(ClockingHint::Source *component, ClockingHint::Preference preference) override;
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const int clock_rate_ = 0;
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uint8_t state_ = 0;
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uint8_t inputs_ = 0;
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uint8_t shift_register_ = 0;
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int stepper_mask_ = 0;
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int stepper_position_ = 0;
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int motor_off_time_ = -1;
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bool is_write_protected();
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std::array<uint8_t, 256> state_machine_;
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Storage::Disk::Drive drives_[2];
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bool drive_is_sleeping_[2];
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int active_drive_ = 0;
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bool motor_is_enabled_ = false;
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void decide_clocking_preference();
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ClockingHint::Preference clocking_preference_ = ClockingHint::Preference::RealTime;
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uint8_t data_input_ = 0;
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int flux_duration_ = 0;
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};
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}
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#endif /* DiskII_hpp */
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